Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Muhammad Tauseef Rab"'
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22:2017-2024
One way to organize 3-D memories is cell arrays stacked on logic where the upper die layers contain the cell arrays and the bottom layer implements the peripheral logic. A new degree of freedom exists when constructing 3-D memories, which is that the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffceb5e2abc461c02f1bc51f710d69a1
https://doi.org/10.1109/tvlsi.2013.2280593
https://doi.org/10.1109/tvlsi.2013.2280593
Publikováno v:
DFT
A new methodology for improving memory repair is presented which can be applied in either manufacture time repair or built-in self-repair (BISR) scenarios. In traditional memory repair, one spare column can only replace one column containing a defect
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fcd19138bd0726cfe7f821201f6b1c38
https://doi.org/10.1109/dft.2009.20
https://doi.org/10.1109/dft.2009.20
Publikováno v:
2009 IEEE International Conference on IC Design and Technology.
Dynamic cache resizing coupled with Built In Self Test (BIST) is proposed to enhance yield of SRAM-based cache memory. BIST is used as part of the power-up sequence to identify the faulty memory addresses. Logic is added to prevent access to the iden
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f79914ef597e0721d65e6a6ea27b071b
https://doi.org/10.1109/icicdt.2009.5166298
https://doi.org/10.1109/icicdt.2009.5166298