Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Muhammad Moazam Azeem"'
Autor:
Osama Elgarhy, Yannick Le Moullec, Luca Reggiani, Muhammad Moazam Azeem, Tarik Taleb, Muhammad Mahtab Alam
Publikováno v:
IEEE Open Journal of Vehicular Technology, Vol 6, Pp 13-33 (2025)
In this paper, the goal is to reduce the time needed for the placement and migration of services of Connected Automated Vehicles (CAVs) using precise hybrid positioning method. First, to place a service in a Multi-access Edge Computing (MEC) node, th
Externí odkaz:
https://doaj.org/article/bc114a95dc3545d3bb1f63e4c24f132f
Publikováno v:
2023 4th International Conference on Smart Grid Metrology (SMAGRIMET).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::888c6074df789c3b55671d4a7b4aeec3
https://doi.org/10.1109/smagrimet58412.2023.10128665
https://doi.org/10.1109/smagrimet58412.2023.10128665
Autor:
Franjo Filipović, Josip Balen, Davor Damjanovic, Rajesh Rimal, Muhammad Moazam Azeem, Adamya Shukla
Publikováno v:
2023 22nd International Symposium INFOTEH-JAHORINA (INFOTEH).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cf5de877c56fa1d5649d21b26c92e359
https://doi.org/10.1109/infoteh57020.2023.10094113
https://doi.org/10.1109/infoteh57020.2023.10094113
Publikováno v:
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2018, 56, pp.169-183. ⟨10.1016/j.micpro.2017.12.006⟩
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2018, 56, pp.169-183. ⟨10.1016/j.micpro.2017.12.006⟩
Prototyping of complex digital systems using multi-FPGA platforms offers several key advantages over other prototyping techniques. These advantages include higher execution speed, lower cost, and real world testing experience. The quality of a protot
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::84878dfee61bd27ea0246dfed313a9b4
https://hal.sorbonne-universite.fr/hal-01667303
https://hal.sorbonne-universite.fr/hal-01667303
Publikováno v:
VTC-Fall
We address the application of using short erasure correcting codes for cognitive radio applications. In order to optimize the efficiency of secondary user in cognitive radio we need to find the optimum functioning point on receiver operating characte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5c7e275bdada2707f408f853fa3f6bf6
https://doi.org/10.1109/vtcfall.2017.8288141
https://doi.org/10.1109/vtcfall.2017.8288141
Publikováno v:
IDT 2016-11th International Design & Test Symposium
IDT 2016-11th International Design & Test Symposium, Dec 2016, Hammamet, Tunisia. pp.171-176, ⟨10.1109/IDT.2016.7843035⟩
IDT
IDT 2016-11th International Design & Test Symposium, Dec 2016, Hammamet, Tunisia. pp.171-176, ⟨10.1109/IDT.2016.7843035⟩
IDT
International audience; Multiple FPGA-based prototyping plays an important role in the design and verification process due to their low cost and high execution speed. However, there is a need to optimize the configuration flow of this multiple FPGA-b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::672a0d52339a54dbbd474df66925e485
https://hal.sorbonne-universite.fr/hal-01657908
https://hal.sorbonne-universite.fr/hal-01657908
Autor:
Muhammad Moazam Azeem, Alexandre Briere, Manuel Bouyer, Julien Denoulet, Francois Pecheux, Andrea Pinna, Bertrand Granado
Publikováno v:
DASIP 2015-The 2015 Conference on Design and Architecturesfor Signal and Image Processing
DASIP 2015-The 2015 Conference on Design and Architecturesfor Signal and Image Processing, Sep 2015, Cracow, Poland
HAL
DASIP 2015-The 2015 Conference on Design and Architecturesfor Signal and Image Processing, Sep 2015, Cracow, Poland
HAL
International audience; The number of cores in a single chip increases with the increase of communication needs. Network on Chips (NoCs) are developed to handle these needs. We present our work to evaluate models of NoC present in the SoCLib library
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::4ea3f24a8f6e31feb576c3351c5e4a72
https://hal.sorbonne-universite.fr/hal-01359307/document
https://hal.sorbonne-universite.fr/hal-01359307/document
Publikováno v:
VTC Fall
VTC Fall 2015-IEEE 82nd Vehicular Technology Conference
VTC Fall 2015-IEEE 82nd Vehicular Technology Conference, Sep 2015, Boston, MA, United States. pp.1-5, ⟨10.1109/VTCFall.2015.7391048⟩
VTC Fall 2015-IEEE 82nd Vehicular Technology Conference
VTC Fall 2015-IEEE 82nd Vehicular Technology Conference, Sep 2015, Boston, MA, United States. pp.1-5, ⟨10.1109/VTCFall.2015.7391048⟩
International audience; We address the utilization of short erasure correcting codes to recover the erased data in opportunistic spectrum access (OSA) due to collisions among multiple users. The main application of using short codes over long codes i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::880a8a130c431db6f7432dcd1a26bc07
https://doi.org/10.1109/vtcfall.2015.7391048
https://doi.org/10.1109/vtcfall.2015.7391048
Publikováno v:
ISWCS
HAL
HAL
We address the use of single parity check product codes (SPCPC) for erasure recovery in opportunistic spectrum access schemes, where erasures are packets lost during a collision with the primary user (PU) due to sensing impairments (non detection). O
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d9ee085e17bb189c793d3da2327bd2df
https://doi.org/10.1109/iswcs.2012.6328333
https://doi.org/10.1109/iswcs.2012.6328333
Publikováno v:
IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2011, Cottbus, Germany
HAL
France. 2011
DDECS
IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2011, Cottbus, Germany
HAL
France. 2011
DDECS
International audience; This paper presents the implementation of the error recovery scheme from temporary faults, applicable for datapaths of coarse-grained reconfigurable architectures. We have chosen the DART architecture as a vehicle to study var
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::47a96016520ddbadaaab1d90ade7de9c
https://hal.inria.fr/hal-00650599
https://hal.inria.fr/hal-00650599