Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Mohit Kapur"'
Autor:
Bharat Sukhwani, Mohit Kapur, Alda Ohmacht, Liran Schour, Martin Ohmacht, Chris Ward, Chuck Haymes, Sameh Asaad
Publikováno v:
Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7763c32d367c7f590e3c5e764b094b2a
https://doi.org/10.1145/3543622.3573158
https://doi.org/10.1145/3543622.3573158
Autor:
Elaine R. Palmer, Kenneth Alan Goldman, Bharata Bhasker Rao, Hani Jamjoom, Lawrence Roy, Janani Janakirman, Brad Frey, Laurent Dufour, Ramachandra N. Pai, John M. Ludden, Cathy May, Guerney D. H. Hunt, Jeffrey A. Stuecheli, Wendel Glenn Voigt, Enriquillo Valdez, Sukadev Bhattiprolu, Mohit Kapur, Rick Boivie, William A. Starke, Paul Mackerras, Michael V. Le, Ryan P. Grimm
Publikováno v:
EuroSys
This paper presents Protected Execution Facility (PEF), a virtual machine-based Trusted Execution Environment (TEE) for confidential computing on Power ISA. PEF enables protected secure virtual machines (SVMs). Like other TEEs, PEF verifies the SVM p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::056982e8b46c51d413ba2e696a9978b5
https://doi.org/10.1145/3447786.3456243
https://doi.org/10.1145/3447786.3456243
Autor:
Todd E. Takken, Bernard Brezzo, Jose A. Tierno, C. Haymes, Proshanta Saha, Sameh W. Asaad, Ralph Bellofatto, Benjamin D. Parker, Mohit Kapur, Thomas Roewer
Publikováno v:
FPGA
Software based tools for simulation are not keeping up with the demands for increased chip and system design complexity. In this paper, we describe a cycle-accurate and cycle-reproducible large-scale FPGA platform that is designed from the ground up
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7358dbaf0bde836c6d4f40552da5241d
https://doi.org/10.1145/2145694.2145720
https://doi.org/10.1145/2145694.2145720
Publikováno v:
FPGA
FPGAs have become indispensible in processor design, bring-up and debug. Traditionally FPGAs have been used in prototyping, allowing end-users to emulate functionality of a specific component of a processor. However, as the complexity of processors g
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c78e430565c7f6b85761e228cdf7ff5b
https://doi.org/10.1145/2145694.2145753
https://doi.org/10.1145/2145694.2145753
Autor:
Young H. Kwark, Mohit Kapur, Mounir Meghelli, Daniel Friedman, Seongwon Kim, Alexander V. Rylyakov
Publikováno v:
CICC
A 2/sup 7/-1 pseudorandom bit sequence (PRBS) generator chip set that operates up to 45 Gb/s was fabricated and tested. The circuits are implemented using bipolar transistors in a SiGe BiCMOS technology and operate from a single -3.3 V power supply.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5e0096ded08fd688b10b1af658141e31
https://doi.org/10.1109/cicc.2003.1249410
https://doi.org/10.1109/cicc.2003.1249410