Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Mohamad Sayadi"'
Publikováno v:
Pizhūhishnāmah-i Iqtiṣād-i Inirzhī-i Īrān, Vol 12, Iss 46, Pp 93-130 (2023)
The main goal of this research is to design a composite economic-energy-environmental performance index (3EPI) for Iran's economy by generalizing the methodology of Khramov and Lee (2013) as well as evaluating the effect of variables on the composite
Externí odkaz:
https://doaj.org/article/edfa9304f1b146579507ab2337045e09
Publikováno v:
Pizhūhishnāmah-i Iqtiṣād-i Inirzhī-i Īrān, Vol 10, Iss 37, Pp 99-128 (2020)
Due to the increasing use of storage as one of the effective methods for peak demand management and increasing the reliability of the electricity network, prioritizing the use of storage is necessary. The purpose of this study was to conduct a multi-
Externí odkaz:
https://doaj.org/article/1415b07f12b34a9da64842ae5d30d46a
Publikováno v:
Pizhūhishnāmah-i Iqtiṣād-i Inirzhī-i Īrān, Vol 3, Iss 9, Pp 31-52 (2014)
Due to price volatility in the oil market, market players are exposed to large risks. Value at Risk (VaR) is one of the main methods to measure market risk in various asset markets including commodities.,. In this study, Upside and Downside Risks are
Externí odkaz:
https://doaj.org/article/69eb3579a66d466ca8faabf21dab53b9
Publikováno v:
SSRN Electronic Journal.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::acf6fc9ba518ec3d1b98b46a11d02860
https://doi.org/10.2139/ssrn.4001297
https://doi.org/10.2139/ssrn.4001297
Autor:
Mohamad Sayadi, Ebrahim Farshidi
Publikováno v:
Analog Integrated Circuits and Signal Processing. 88:401-414
An all-digital phase locked loop (ADPLL) taking new approach for design of the loop filter is presented. A feedback loop in the time domain by modeling the DCO and TDC as an appropriate model in the state-space form is proposed. Then, a model predict
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::13e3227ac86362b983e0daaf44c08cdc
https://doi.org/10.1007/s10470-016-0794-1
https://doi.org/10.1007/s10470-016-0794-1
Publikováno v:
20th Iranian Conference on Electrical Engineering (ICEE2012).
This paper presents a new approach for design of a digital phase locked loop. By employing a digitally controlled oscillator (DCO) and a time-to-digital converter (TDC), the loop filter of a DPLL becomes all-digital. Instead of designing the loop fil
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::072b0a8b86a1c2eb18a7be996908cdc0
https://doi.org/10.1109/iraniancee.2012.6292324
https://doi.org/10.1109/iraniancee.2012.6292324