Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Minoru Saeki"'
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. (7):1323-1333
The single-shot collision attack on RSA proposed by Hanley et al. is studied focusing on the difference between two operands of multiplier. It is shown that how leakage from integer multiplier and long-integer multiplication algorithm can be asymmetr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::45a5124e93e2a950ff36017b6b22b6e5
http://id.nii.ac.jp/1438/00008860/
http://id.nii.ac.jp/1438/00008860/
Publikováno v:
Journal of Cryptographic Engineering. 4:59-73
Leaks inside semi-custom application-specific integrated circuit design primitives are rigorously investigated. The study is conducted by measuring a dedicated test element group chip with a small magnetic field probe on the chip surface. Measurement
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1a51fde42bfb4684e9e5bed1328d1832
https://doi.org/10.1007/s13389-014-0078-6
https://doi.org/10.1007/s13389-014-0078-6
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :200-210
In this paper we first demonstrate that effective selection functions in power analysis attacks change depending on circuit architectures of a block cipher. We then conclude that the most resistant architecture on its own, in the case of the loop arc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::651f95b459e88f4a89723548e24b069a
https://doi.org/10.1587/transfun.e94.a.200
https://doi.org/10.1587/transfun.e94.a.200
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :2497-2508
A design methodology of Random Switching Logic (RSL) using CMOS standard cell libraries is proposed to counter power analysis attacks against cryptographic hardware modules. The original RSL proposed in 2004 requires a unique RSL-gate for random data
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::52c5071f60c2d517f3d04d6c312a559f
https://doi.org/10.1587/transfun.e93.a.2497
https://doi.org/10.1587/transfun.e93.a.2497
Autor:
Daisuke Suzuki, Minoru Saeki
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :176-183
In recent years, some countermeasures have been proposed against differential power analysis (DPA) at the basic composition element level of logic circuits. We propose a countermeasure named random switching logic (RSL). RSL involves computation with
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::94e20b26c7bc2c986013614a60e67858
https://doi.org/10.1093/ietfec/e91-a.1.176
https://doi.org/10.1093/ietfec/e91-a.1.176
Autor:
Minoru Saeki, Daisuke Suzuki
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :184-192
In recent years, certain countermeasures against differential power analysis (DPA) at the logic level have been proposed. Recently, Popp and Mangard proposed a new countermeasure-masked dual-rail pre-charge logic (MDPL); this countermeasure combines
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1e20e23f6b1a303965eaa854b8a5021c
https://doi.org/10.1093/ietfec/e91-a.1.184
https://doi.org/10.1093/ietfec/e91-a.1.184
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :169-178
In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate, and are naturally applicable to various actual devices for simulatin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a9a64cf2dc52620bce54bae78ff979aa
https://doi.org/10.1093/ietfec/e90-a.1.169
https://doi.org/10.1093/ietfec/e90-a.1.169
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :160-168
This paper proposes a new countermeasure, Random Switching Logic (RSL), against DPA (Differential Power Analysis) and Second-Order DPA at the logic level. RSL makes a signal transition uniform at each gate and suppresses the propagation of glitch to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0148802f121fc2b22bdc298ba16a9c76
https://doi.org/10.1093/ietfec/e90-a.1.160
https://doi.org/10.1093/ietfec/e90-a.1.160
Publikováno v:
Constructive Side-Channel Analysis and Secure Design ISBN: 9783319214757
COSADE
COSADE
The single-shot collision attack on RSA proposed by Hanleyi¾?eti¾?al. is studied focusing on the difference between two operands of multipliers. There are two consequences. Firstly, designing order of operands can be a cost-effective countermeasure
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55ae32324d8470d086835d2378fdd17a
https://doi.org/10.1007/978-3-319-21476-4_5
https://doi.org/10.1007/978-3-319-21476-4_5
Publikováno v:
Cryptographic Hardware and Embedded Systems-CHES 2013 ISBN: 9783642403484
CHES
CHES
Leaks inside semi-custom ASIC (Application Specific Integrated Circuit) design primitives are rigorously investigated. The study is conducted by measuring a dedicated TEG (Test Element Group) chip with a small magnetic-field probe on the chip surface
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::255d5a57246bce0c41671fae8be18ef6
https://doi.org/10.1007/978-3-642-40349-1_10
https://doi.org/10.1007/978-3-642-40349-1_10