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In principle, the resolution of a successive approximation (SAR) analog-to-digital converter (ADC) can be increased by 1 bit by quadrupling the area and the power dissipation. In practice, due to the increased size of the capacitor array and conseque
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::31506d3ea42d8d01815dc11d40ded03e
https://doi.org/10.1109/iscas45731.2020.9180536
https://doi.org/10.1109/iscas45731.2020.9180536
