Zobrazeno 1 - 10
of 29
pro vyhledávání: '"Ming-lun Gao"'
Publikováno v:
2009 Fourth International Conference on Embedded and Multimedia Computing.
The cluster-based multiprocessor system-on-chip (MPSoC), which adopts the hybrid interconnection composed of both bus-based and NoC architecture, is a new infrastructure for MPSoC. For obtaining the fast exploration of multiple hardware (HW) and soft
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e352622c338679a4ed9142254de7d30c
https://doi.org/10.1109/em-com.2009.5402984
https://doi.org/10.1109/em-com.2009.5402984
Publikováno v:
APCCAS
A multi-pipeline dynamically reconfigurable system (MPRS) with coarse-grained processing elements is described in this paper. A systematic mapping method implemented by analyzing a dependence graph with reconfigurable variables (DGRV) based on an MPR
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2ba4febdf9c742b0520b4f38b8c45f4
https://doi.org/10.1109/apccas.2008.4745954
https://doi.org/10.1109/apccas.2008.4745954
Publikováno v:
APCCAS
A low power consumption, high speed op-amp is designed for a 10-bit, 100 MSPS parallel pipeline A/D converter. The op-amp plays an important role in the ADC, because its conversion rate and power consumption are limited by the performance of the op-a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7ff930b8d6c61ec012c3939a8abd5c6e
https://doi.org/10.1109/apccas.2008.4746148
https://doi.org/10.1109/apccas.2008.4746148
Publikováno v:
2008 2nd International Conference on Anti-counterfeiting, Security and Identification.
Based on analyzing of the influence of the current switch driver on dynamic performance of the high-speed current-steering DAC, several key points of designing the current switch driver are proposed. The low cross-point method, synchronous flip-latch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3a31096827416c307a707ee271175f9f
https://doi.org/10.1109/iwasid.2008.4688421
https://doi.org/10.1109/iwasid.2008.4688421
Publikováno v:
2007 7th International Conference on ASIC.
A 14-bit, 130MSPS DAC with 2times FIR interpolation filter simulated in a 0.35 mum CMOS process is described in this paper. The DAC adopts segmented current-steering structure, which combines the characteristic of unit current DAC and the binary weig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ac5ab27d077cf619d7460a01e538a9c6
https://doi.org/10.1109/icasic.2007.4415728
https://doi.org/10.1109/icasic.2007.4415728
Publikováno v:
2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.
As technology scales towards deep submicron, the integration of more than one processor on a chip is becoming possible. The communication architecture is becoming the bottleneck for multi-processor SoC, and efficient arbiter is able to solve the cont
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a18567770a96d5b2dca6fd6d3acaf623
https://doi.org/10.1109/icsict.2006.306551
https://doi.org/10.1109/icsict.2006.306551
Publikováno v:
2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.
Image scaling plays an important role in digital image processing. It is widely applied in all sorts of display terminals. A new scaling method was proposed in this paper. The method combines traditional nearest neighbor and bilinear methods in a sim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::378ee5f577883e42d412e8b7daaea6f6
https://doi.org/10.1109/icsict.2006.306544
https://doi.org/10.1109/icsict.2006.306544
Autor:
Yi Xu, Yi-hua Tang, Zhao-yu Jiang, Ming-lun Gao, Bing Zhang, Gao-ming Du, Ning Hou, Luo-Feng Geng, Wei Zhang
Publikováno v:
2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.
The increasing system resources available on field-programmable gate arrays (FPGA) enable the integration of complex system on one programmable chip. This paper focuses on the design and implementation of a hierarchy-bus based multi-processor system-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2bd749a7b5c5d6a6b51ee958e2794eab
https://doi.org/10.1109/icsict.2006.306543
https://doi.org/10.1109/icsict.2006.306543
Publikováno v:
Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..
In this paper we bring forward a new technology to re-reuse the PCI AD bus based on the timing sharing reuse technology. It makes the peripheral device can use the PCI AD bus to receive and send data from and to the master device. Though need to desi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::af4a16ec9c5fb582af874ef51f242383
https://doi.org/10.1109/icsict.2004.1436820
https://doi.org/10.1109/icsict.2004.1436820
Publikováno v:
Fifth World Congress on Intelligent Control and Automation (IEEE Cat. No.04EX788).
Based on analyzing the evolution mechanism of SGA (Selfish Gene Algorithm), an implementation methodology on automatic stimuli generation and stimuli optimization in digital IC (Integrate Circuit) verification was studied in this paper. Basic items o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d36126ebcca307dadc44402ba6a2824
https://doi.org/10.1109/wcica.2004.1341975
https://doi.org/10.1109/wcica.2004.1341975