Zobrazeno 1 - 10
of 59
pro vyhledávání: '"Ming-Wen Ma"'
Autor:
Ming-Wen Ma, 馬鳴汶
96
In this dissertation, the impacts of HfO2 interfacial layer on n- and p-channel LTPS-TFTs are specified. In order to enhance the characteristics of HfO2 LTPS-TFT further, oxygen plasma surface treatment is employed to improve the interface qu
In this dissertation, the impacts of HfO2 interfacial layer on n- and p-channel LTPS-TFTs are specified. In order to enhance the characteristics of HfO2 LTPS-TFT further, oxygen plasma surface treatment is employed to improve the interface qu
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/01251556879353623379
Autor:
Ming-Wen Ma, 馬鳴汶
92
As the feature sizes of complementary metal-oxide-semiconductor (CMOS) devices are scaled downward, the gate dielectric thickness must also decrease to maintain a value of capacitance to keep device drive current at an acceptable level. The S
As the feature sizes of complementary metal-oxide-semiconductor (CMOS) devices are scaled downward, the gate dielectric thickness must also decrease to maintain a value of capacitance to keep device drive current at an acceptable level. The S
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/wk2n2w
Publikováno v:
2007 Cleantech Conference and Trade Show Cleantech 2007 ISBN: 9780429187469
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3c8e19be5c80968f063e4522613530f6
https://doi.org/10.1201/9780429187469-32
https://doi.org/10.1201/9780429187469-32
Publikováno v:
IEEE Transactions on Electron Devices. 55:3489-3493
In this paper, high-performance complementary-metal-oxide-semiconductor low-temperature polycrystalline-silicon thin-film transistors (CMOS LTPS-TFTs) with HfO2 gate dielectric are fabricated on one wafer for the first time. Low threshold voltage and
Autor:
Tien-Sheng Chao, Woei-Cherng Wu, Chao-Sung Lai, Jer-Chyi Wang, Ming-Wen Ma, Te-Hsin Chiu, Wen-Cheng Lo
Publikováno v:
IEEE Electron Device Letters. 29:1340-1343
The positive bias temperature instability (PBTI) characteristics of contact-etch-stop-layer (CESL)-strained HfO2 nMOSFET are thoroughly investigated. For the first time, the effects of CESL on an HfO2 dielectric are investigated for PBTI characterist
Autor:
Woei-Cherng Wu, Chih-Yang Chen, Kuo-Hsing Kao, Chun-Jung Su, Tan Fu Lei, Ming-Wen Ma, Tien-Sheng Chao
Publikováno v:
IEEE Transactions on Electron Devices. 55:1153-1160
In this paper, a comprehensive study of the reliability mechanisms of high-performance low-temperature polycrystalline-Si thin-film transistor (LTPS-TFT) with gate dielectric is reported for the first time. Various bias- and temperature-stress condit
Autor:
Tan Fu Lei, Tsung Yu Yang, Tien-Sheng Chao, Chih-Yang Chen, Chun Jung Su, Ming Wen Ma, Woei Cherng Wu, Kuo-Hsing Kao
Publikováno v:
Solid-State Electronics. 52:342-347
In this paper, we demonstrate the low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with TaN metal-gate and HfO 2 gate dielectric to achieve high performance characteristics. A high performance LTPS-TFT with low threshold volt
Autor:
Tien-Sheng Chao, Ming-Wen Ma, Kuo-Hsing Kao, Tan Fu Lei, Woei-Cherng Wu, Shui-Jinn Wang, Chien-Hung Wu, Tsung-Yu Yang
Publikováno v:
IEEE Electron Device Letters. 28:238-241
In this letter, 65-nm node silicon-on-insulator devices with high-kappa offset spacer dielectric were investigated by extensive 2-D device simulation. The result shows that the high-kappa offset spacer dielectric can effectively increase the on-state
Publikováno v:
Japanese Journal of Applied Physics. 45:6854-6859
In this study, the fringing electric field effect on 65-nm-node technology fully depleted silicon-on-insulator (FD SOI) device is comprehensively examined. A new anomalous degradation in device on-state/off-state characteristics on a nanoscale metal
Autor:
Tsung-Yu Chiang, Chia-Chun Liao, Chi-Ruei Yeh, Ming-Wen Ma, Po-Yi Kuo, Yi-Hong Wu, Kuan-Ti Wang, Tien-Sheng Chao
Publikováno v:
IEEE Electron Device Letters. 30:954-956
In this letter, for the first time, one-time-programmable (OTP) memory fabricated on the low-temperature poly-Si p-channel thin-film transistor (TFT) with metal-induced lateral-crystallization channel layer and high-kappa dielectrics is demonstrated.