Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Ming‐Hsing Tsai"'
Publikováno v:
Microelectronic Engineering. 87:2065-2070
Due to its brittle nature, high stress-induced in manufacturing process, silicon wafer breakage has become a major concern for all semiconductor fabrication line. Furthermore, the production cost had increased in advanced technology day by day. Even
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::52c2604434e98be9ef5e52ebbbcd92a5
https://doi.org/10.1016/j.mee.2009.12.083
https://doi.org/10.1016/j.mee.2009.12.083
Publikováno v:
Microelectronic Engineering. 87:1809-1815
Given the trend towards wafers of a larger diameter, microelectronics circuits are driven by modern IC manufacturing technology. Silicon wafer breakage has become a major concern of all semiconductor fabrication lines because silicon wafer is brittle
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54614c4036be4290ff3d79f20f33cce0
https://doi.org/10.1016/j.mee.2009.08.019
https://doi.org/10.1016/j.mee.2009.08.019
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 9:74-79
In this paper, the impact of strain engineering on device performance and reliability for fully silicide gate silicon-on-insulator CMOSFET was investigated. With characterizing device's electrical property after hot carrier (HC) and positive/negative
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c3ec88d8796d4b136b9edc53b8f1094f
https://doi.org/10.1109/tdmr.2008.2010622
https://doi.org/10.1109/tdmr.2008.2010622
Autor:
Mao-Chieh Chen, Lu-Min Liu, Ming‐Hsing Tsai, Pei-Jan Wang, Wen Kuan Yeh, Mou‐Shiung Lin, Sheng‐ Hsiung Chen
Publikováno v:
Journal of The Electrochemical Society. 142:3584-3588
Preclean of aluminum trench and via patterned substrates is vital for successful selective chemical vapor deposition of tungsten (CVD-W). A convenient preclean method uses in situ BCl 3 plasma etching to remove the native metal oxide prior to conduct
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00b107fc49957d5bf22f4c2264389a1a
https://doi.org/10.1149/1.2050027
https://doi.org/10.1149/1.2050027
Publikováno v:
Journal of The Electrochemical Society. 142:L223-L225
Annealing processes are an important area of fundamental research within the field of diamond electronic applications. In this study, annealing was applied to as-grown boron-doped diamond films. The current-voltage (I-V) characteristics of the Al/bor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::10295c8f90bb7a6dd21cb2f2a83918c9
https://doi.org/10.1149/1.2048504
https://doi.org/10.1149/1.2048504
Publikováno v:
Journal of Applied Physics. 77:940-942
A new process, which employs the photoresist or SiO2 as a mask, the CH4‐CO2 gas mixtures as the gas source of diamond deposition, and the HF:HNO3:H2O (1:1.1:10) solution as etching solution after the first step deposition, has been developed to imp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ad87f0759412e26d5c569590a9e28d1a
https://doi.org/10.1063/1.359023
https://doi.org/10.1063/1.359023
Autor:
Aaron Frank, J.D. Luttmer, Ming-Hsing Tsai, V. Parihar, Matt Nowell, R. A. Augur, Qing-Tang Jiang, R.H. Havemann
Publikováno v:
2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).
The effect of different post electroplating anneals on dual damascene Cu microstructures and via chain yields using both rapid thermal processing and furnace anneal were investigated. It was found the grain size, [111] texture and Cu line resistance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ac14bc6999405fe0147fac8437eb850c
https://doi.org/10.1109/icsict.2001.981504
https://doi.org/10.1109/icsict.2001.981504
Publikováno v:
Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461).
Studies were carried out to characterize the copper line resistivity as a function of linewidth for sub-130 nm feature size. The Cu line resistivity was found to increase rapidly as the feature size becomes smaller than 0.2 /spl mu/m. Electron scatte
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::51891266550bb6276a533f15269d1f81
https://doi.org/10.1109/iitc.2001.930068
https://doi.org/10.1109/iitc.2001.930068
Autor:
V. Blaschke, C.H. Yu, W.K. Yeh, Ming-Hsing Tsai, M.S. Liang, Ennis T. Ogawa, Paul S. Ho, R. Augur, R.H. Havemann, Shau-Lin Shue
Publikováno v:
Proceedings of the IEEE 2001 International Interconnect Technology Conference (Cat. No.01EX461).
Electromigration (EM) characteristics were evaluated for multilevel copper test structures embedded in a CVD SiOC low k inter-metal dielectric. After electromigration stress testing, Cu extrusion along the interface between SiOC and the SiN dielectri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ffbfa24cf96a34760b80268f68062bc5
https://doi.org/10.1109/iitc.2001.930080
https://doi.org/10.1109/iitc.2001.930080
Autor:
Kuang-Yang Chan, Ting-Chang Chang, Mao-Chich Chen Mou-Shiung Lin, Wen-Kuan Yeh, Ming-Hsing Tsai, Sheng‐ Hsiung Chen
Publikováno v:
Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f82b3035e1e2f026d1bd14c986b4225e
https://doi.org/10.7567/ssdm.1995.pc-3-2
https://doi.org/10.7567/ssdm.1995.pc-3-2