Zobrazeno 1 - 10
of 21
pro vyhledávání: '"Mincent Lee"'
Publikováno v:
2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::08029d3dcfd2d3c75cf7f84b6177371c
https://doi.org/10.1109/vlsi-dat54769.2022.9768060
https://doi.org/10.1109/vlsi-dat54769.2022.9768060
Autor:
Chia-Heng Tsai, Kuan-Wei Hou, Mincent Lee, Hao Chen, Min-Jer Wang, Cheng-Wen Wu, Chien-Hui Chuang
Publikováno v:
ITC-Asia
Integrated passive devices (IPDs) have been widely used in advanced packaging of semiconductor chips, to improve their power integrity and impedance matching. There is a growing demand in guaranteeing signal and power integrity for the chips used in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::87d939f3294babced08fbd93a24c73f5
https://doi.org/10.1109/itc44778.2020.9325221
https://doi.org/10.1109/itc44778.2020.9325221
Publikováno v:
ITC-Asia
This paper introduces an anomaly detection methodology with machine learning for Circuit Probing (CP) using Integrated Passive Device (IPD) as example devices. The IPD can improve the power integrity, performance, and package dimensions of the Integr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::60927d3e8e789183d759410612ce3877
https://doi.org/10.1109/itc-asia51099.2020.00012
https://doi.org/10.1109/itc-asia51099.2020.00012
Publikováno v:
ITC
This paper introduces a high quality screening methodology, using Integrated Passive Device (IPD) as an example device, which has the capability to increase power integrity of Integrated Fan Out Wafer Level Chip Scale Package (InFO WLCSP). InFO WLCSP
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dbe1dec535af71a6a518940c7cbcf2a9
https://doi.org/10.1109/itc44170.2019.9000174
https://doi.org/10.1109/itc44170.2019.9000174
Autor:
Ching-Nen Peng, Bing-Yang Lin, Wan-Ting Chiang, Cheng-Wen Wu, Min-Jer Wang, Mincent Lee, Hung-Chih Lin
Publikováno v:
IEEE Design & Test. 33:30-39
Three-dimensional stacked memory stacking logic and memory dies are one of the most promising 3-D integration applications. This paper proposes two memory redundancy schemes to improve the yield of channelbased 3-D stacked DRAM by sharing spare memor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2ee340ffc487c263440361add2d7baf8
https://doi.org/10.1109/mdat.2015.2455347
https://doi.org/10.1109/mdat.2015.2455347
Publikováno v:
IEEE Transactions on Computers. 65:770-780
Due to more aggressive design rules adopted by memories than logic circuits, memories have been considered as the major technology driver of advanced logic circuits, so far as CMOS process technology is concerned. Memory failure pattern identificatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6298139065a456e7cda39997b30fb074
https://doi.org/10.1109/tc.2015.2462820
https://doi.org/10.1109/tc.2015.2462820
Autor:
Yu-Chieh Huang, Ching-Nen Peng, Hao Chen, Cheng-Wen Wu, Mincent Lee, Bing-Yang Lin, Min-Jer Wang, Hung-Chih Lin
Publikováno v:
DAC
With the increasing demand of super high scale of integration and small form factor in advanced semiconductor products, especially those that integrate DRAM and logic dies, 3D IC and Wafer-Level Chip-Scale Packaging (WLCSP) are considered promising a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::28f2b92e2e1ffec1c00cfe9e056863b4
https://doi.org/10.1145/2897937.2898015
https://doi.org/10.1145/2897937.2898015
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 30:919-929
There is growing need for embedded memory built-in self-repair (MBISR) due to the introduction of more and more system-on-chip (SoC) and other highly integrated products, for which the chip yield is being dominated by the yield of on-chip memories, a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54591d320c7c5e70aa2f8891554371ca
https://doi.org/10.1109/tcad.2011.2106812
https://doi.org/10.1109/tcad.2011.2106812
Akademický článek
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Autor:
Ching-Nen Peng, Bing-Yang Lin, Cheng-Wen Wu, Wan-Ting Chiang, Mincent Lee, Hung-Chih Lin, Min-Jer Wang
Publikováno v:
ITC
The three-dimensional integrated circuit (3D IC) is considered a promising approach that can obtain high data band-width and low power consumption for future electronic systems that require high integration level. One of the popular drivers for 3D IC
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9dc4ae50da18ea7ab97b4c6145a86fbb
https://doi.org/10.1109/test.2014.7035331
https://doi.org/10.1109/test.2014.7035331