Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Min-Shueh Yuan"'
Autor:
Hung-Yi Kuo, Chih-Hsien Chang, Chia-Chun Liao, Tsung-Hsien Tsai, Yu-Tso Lin, Robert Bogdan Staszewski, Tien-Chien Huang, Min-Shueh Yuan, Chao-Chieh Li, Hsien-Yuan Liao, Augusto Ronchini Ximenes, Chung-Ting Lu
Publikováno v:
IEEE Transactions on Circuits and Systems Part 1: Regular Papers, 68(5)
In this article, we introduce a fractional-N all-digital phase-locked loop (ADPLL) architecture based on a single LC-tank, featuring an ultra-wide tuning range (TR) and optimized for ultra-low area in 10-nm FinFET CMOS. Underpinned by excellent switc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::781267e6c3d690f90035b9fbe91755e9
https://doi.org/10.1109/tcsi.2021.3059484
https://doi.org/10.1109/tcsi.2021.3059484
Autor:
Chih-Hsien Chang, Chia-Chun Liao, Robert Bogdan Staszewski, Min-Shueh Yuan, Yu-Tso Lin, Chao-Chieh Li
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 67:2878-2882
In this brief, we introduce a 3.2–4 GHz three-winding transformer-based class-F digitally controlled oscillator (DCO) with a DC-DC booster for energy harvesting applications. A $\pi $ -model is adopted for this multi-turn transformer to analyze its
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22939fc229f992bd2e0f86ff7b608148
https://doi.org/10.1109/tcsii.2020.2989415
https://doi.org/10.1109/tcsii.2020.2989415
Autor:
Chia-Chun Liao, Chih-Hsien Chang, Robert Bogdan Staszewski, Yu-Tso Lin, Min-Shueh Yuan, Chao-Chieh Li
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:3660-3671
In this paper, we introduce an all-digital phase-locked loop (ADPLL) for Bluetooth low energy (BLE) that eliminates the need for a crystal oscillator (XO) other than a 32.768-kHz real-time clock (RTC) already present in wireless systems. Specifically
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e6268969e52869cd4d7b178e9379ca8d
https://doi.org/10.1109/jssc.2018.2871632
https://doi.org/10.1109/jssc.2018.2871632
Autor:
Chih-Hsien Chang, Min-Shueh Yuan, Yu-Tso Lin, Robert Bogdan Staszewski, Naser Pourmousavian, Chao-Chieh Li
Publikováno v:
IEEE Solid-State Circuits Letters. 1:158-161
We introduce the first monolithic step-up dc–dc converter operating at deep sub-1 V (i.e., 0.18–0.4 V) that outputs significant power for Internet-of-Things with a peak power efficiency of 81.2% at 50 $ {\mu }\text{W}$ output power for the 0.18-V
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::845cf031cbaefef49bee6029944ee5ac
https://doi.org/10.1109/lssc.2018.2889422
https://doi.org/10.1109/lssc.2018.2889422
Autor:
Min-Shueh Yuan, Chih-Hsien Chang, Robert Bogdan Staszewski, Chao-Chieh Li, Chia-Chun Liao, Yu-Tso Lin
Publikováno v:
ISSCC
The current paradigm of frequency synthesis for short-range wireless transceivers, such as BLE, is to use a crystal oscillator (XO) in the tens-of-MHz range as a frequency reference (FREF) to phase lock an RF oscillator [1-4]. This ensures a sufficie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f75d32e39d60943b7359f6fc4e3283f
https://doi.org/10.1109/isscc.2018.8310377
https://doi.org/10.1109/isscc.2018.8310377
Autor:
Yu-Tso Lin, Chia-Chun Liao, Kenny Hsieh, Chih-Hsien Chang, Robert Bogdan Staszewski, Mark Chen, Chao-Chieh Li, Min-Shueh Yuan
Publikováno v:
ISSCC
Energy harvesting (EH) is a topic of intensive research promising battery-free operation of massive networks of wireless IoT devices. To simultaneously satisfy the EH and IoT, ultra-low-power (ULP) consumption with ultra-low-voltage (ULV) supply are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::21e4277d216269c3baccbc882812dcfb
https://doi.org/10.1109/isscc.2017.7870396
https://doi.org/10.1109/isscc.2017.7870396
Autor:
Min-Shueh Yuan, Hung-Yi Kuo, Chung-Ting Lu, Chao-Chieh Li, Hsien-Yuan Liao, Mark Chen, Kenny Hsieh, Augusto Ronchini Ximenes, Robert Bogdan Staszewski, Chih-Hsien Chang, Tien-Chien Huang, Chia-Chun Liao, Tsung-Hsien Tsai
Publikováno v:
VLSI Circuits
A tiny LC-tank-based ADPLL in 10nm FinFET CMOS achieves an area comparable to that of inverter-based ring-oscillator PLLs. A DCO occupying 0.016mm2 uses a controllable multi-turn magnetic coupling transformer to extend its tuning range to 10.8–19.3
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00f3cbc7a046bd2cc5e0f0d31cbc323c
https://doi.org/10.1109/vlsic.2016.7573551
https://doi.org/10.1109/vlsic.2016.7573551
Autor:
Chia-Chun Liao, Min-Shueh Yuan, Tsung-Hsien Tsai, Chih-Hsien Chang, Chao-Chieh Li, Robert Bogdan Staszewski
Publikováno v:
ISSCC
All-digital phase-locked loops (ADPLLs) offer faster locking time, easier portability and better performance in advanced semiconductor processes as compared to analog PLLs. Advanced FinFET devices exhibit better g m and I ON than planar devices [1],
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d008b2cae90a2e67c49c8bd71b8bf9a4
https://doi.org/10.1109/isscc.2015.7063025
https://doi.org/10.1109/isscc.2015.7063025
Publikováno v:
CICC
A 0.1-3 GHz, cell-based, fractional-N ADPLL with ΔΣ noise-shaped phase detector is presented. By dithering the reference phase and quantization phase error through an additional feedback path, linear phase detection and zero stabilization are accom
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::51dd5313643aa6f3afe1a09514bb7eab
https://doi.org/10.1109/cicc.2013.6658528
https://doi.org/10.1109/cicc.2013.6658528