Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Min-Ru Peng"'
Autor:
Min-Ru Peng, 彭敏茹
101
Since 45nm process generation and beyond, high-k/metal-gate (HK/MG) combining strain engineering technology for nano-scale MOSFETs incorporated into the conventional CMOS process is available and promising to increase the drive current. In t
Since 45nm process generation and beyond, high-k/metal-gate (HK/MG) combining strain engineering technology for nano-scale MOSFETs incorporated into the conventional CMOS process is available and promising to increase the drive current. In t
Externí odkaz:
http://ndltd.ncl.edu.tw/handle/qvz6gd
Autor:
Shea-Jue Wang, Shih Ching Lee, L S Huang, Chuan-Hsi Liu, Osbert Cheng, Min-Ru Peng, Shuang-Yuan Chen, Mu-Chun Wang, Chong-Kuan Du
Publikováno v:
2013 International Symposium on Next-Generation Electronics.
Although decoupled plasma nitridation (DPN) post high-k dielectric deposition shows the better threshold voltage shift than post deposition anneal (PDA), the non-adequate plasma nitrogen (N) concentration and anneal temperature still can dominate the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b03910d5f252826420ab98bff356257e
https://doi.org/10.1109/isne.2013.6512375
https://doi.org/10.1109/isne.2013.6512375
Autor:
Shea-Jue Wang, Hong-Wen Hsu, Wen-Shiang Liao, Mu-Chun Wang, Liang-Ru Ji, Chuan-Hsi Liu, Heng-Sheng Huang, Min-Ru Peng, Shuang-Yuan Chen
Publikováno v:
2013 International Symposium on Next-Generation Electronics.
Reported literatures have investigated the effects of pMOSFETs with embedded SiGe source/drain stressor, but devices incorporated with biaxial strain and embedded SiGe source/drain has not been clearly probed. In this study, the characteristics of de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8149e5218a9f6a23e717b6a8a4550d67
https://doi.org/10.1109/isne.2013.6512370
https://doi.org/10.1109/isne.2013.6512370
Autor:
Liang-Ru Ji, Mu-Chun Wang, Shea-Jue Wang, Heng-Sheng Huang, Wen-Shiang Liao, Min-Ru Peng, Shuang-Yuan Chen, Hong-Wen Hsu
Publikováno v:
2013 IEEE 5th International Nanoelectronics Conference (INEC).
The embedded SiGe source/drain stressor helpful to promote the drive current involves etching out the source/drain silicon and replacing it with SiGe filler. This process uses the lattice mismatch between silicon and germanium atoms making the silico
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4061a700dc1a6f1f0b672871d10a0bbc
https://doi.org/10.1109/inec.2013.6466020
https://doi.org/10.1109/inec.2013.6466020
Autor:
Wen-Shiang Liao, Heng-Sheng Huang, Zhen-Ying Hsieh, Min-Ru Peng, Mu-Chun Wang, Hsin-Chia Yang, Shuang-Yuan Chen
Publikováno v:
2010 International Symposium on Next Generation Electronics.
Strained engineering in nano process technology is considered to be a promising enhancements on the electric characteristics of MOSFET devices. Both tensile and compressive strains are applied to NMOS and PMOS individually using silicon nitride as co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cf07a9775019e01e1105881367792ee4
https://doi.org/10.1109/isne.2010.5669166
https://doi.org/10.1109/isne.2010.5669166
Autor:
Min Ru Peng, Heng Sheng Huang, Shuang-Yuan Chen, Wen Shiang Liao, Mu-Chun Wang, Shea Jue Wang, Chuan-Hsi Liu, Ming Feng Lu, Liang Ru Ji
Publikováno v:
International Journal of Nanotechnology. 11:62
The embedded SiGe source/drain (S/D) stressor applies the lattice mismatch between silicon and germanium atoms making silicon channel generate compressive strain in the surface channel. The compressive strain enhances hole mobility due to raising the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::869e848d40445583a3017917ccf0bc15
https://doi.org/10.1504/ijnt.2014.059810
https://doi.org/10.1504/ijnt.2014.059810
Autor:
Tsao Yeh Chen, Mu-Chun Wang, Wen Shiang Liao, Hsin-Chia Yang, Shea Jue Wang, Min Ru Peng, Heng Sheng Huang, Chuan-Hsi Liu
Publikováno v:
International Journal of Materials and Product Technology. 49:25
In the nano-regime MOSFET devices, the punch-through effect is more distinct, retarding the reliability tolerance, such as electro-static discharge or latch-up applications. Through the measurement in various device lengths under contact-etch-stop-la
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d105191afd3146358675d29061e8e514
https://doi.org/10.1504/ijmpt.2014.062939
https://doi.org/10.1504/ijmpt.2014.062939
Autor:
Hsin-Chia Yang, Wen-Shiang Liao, Min-Ru Peng, Mu-Chun Wang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang
Publikováno v:
2010 International Symposium on Next-Generation Electronics (ISNE); 2010, p186-189, 4p