Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Mikhail Nagoga"'
Publikováno v:
Microelectronic Engineering. 72:342-346
Autor:
Mikhail Nagoga, P. Fazan, Kristin De Meyer, Jean-Michel Sallese, Sorin Cristoloveanu, Serguei Okhonin, Hans Van Meer, J. Pontcharra, O. Faynot
Publikováno v:
Solid-State Electronics. 46:1709-1713
The transients in partially depleted (PD) silicon on insulator (SOI) MOSFETs produced with 0.25 and 0.13 μm technologies are studied. The exponential dependence of the switch-on transient time on the reciprocal drain voltage for both P- and N-channe
Autor:
Serguei Okhonin, J. Pontcharra, Sorin Cristoloveanu, Mikhail Nagoga, O. Faynot, P. Fazan, Jean-Michel Sallese
Publikováno v:
Microelectronic Engineering. 59:469-473
We investigated the transients in 0.25 μm PD SOI devices. A good agreement between experimental and simulation results has been observed. The exponential dependence of the switch-on transient time on the reciprocal drain voltage for both p- and n-ch
Publikováno v:
IEEE Electron Device Letters. 23:279-281
A new method to determine the interface trap density in partially depleted silicon-on-insulator (SOI) floating body MOSFETs is proposed for the first time. It can be considered as a "transient" charge-pumping (CP) technique in contrast to the normall
Publikováno v:
IEEE Electron Device Letters. 23:85-87
A simple true 1 transistor dynamic random access memory (DRAM) cell concept is proposed for the first time, using the body charging of partially-depleted SOI devices to store the logic "1" or "0" binary states. This cell is two times smaller in area
Autor:
Isabelle Ferain, Jean-Pierre Colinge, Ran Yu, Mikhail Nagoga, Abhinav Kranti, N. Dehdashti Akhavan, Christopher W. Lee, Serguei Okhonin, Ran Yan, Pedram Razavi
Publikováno v:
Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials.
Publikováno v:
2008 IEEE International SOI Conference.
The leakage current of SOI based Floating Body Memory (FBM) has been modeled. The model takes into account oxide/SOI interface traps (Dit) and Electric Field Enhanced (EFE) generation of electron hole pairs (EHPs) from trap states via the Poole-Frenk
Publikováno v:
2007 IEEE International Electron Devices Meeting.
A new generation of the single transistor floating body DRAM is introduced for the first time. The new memory is largely based on the bipolar transistor existing in the MOS structure. The memory's main features are high margin, low-power consumption,
Autor:
M. Gostkowski, Klaus Schruefer, Weize Xiong, P. Patruno, C. Maleville, Serguei Okhonin, Cedric Bassin, C.R. Cleavelin, P. Fazan, T. Schulz, Mikhail Nagoga
Publikováno v:
2005 IEEE International SOI Conference Proceedings.
In this paper we experimentally study for the first time the retention characteristics of Z-RAM cells based on CMOS FinFET and tri-gate devices. A retention time of few milliseconds is measured at room temperature on 100 nm devices. This FinFET based
Publikováno v:
Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials.