Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Mihail Asavoae"'
Autor:
Simon Tollec, Vedad Hadži´c, Pascal Nasahl, Mihail Asavoae, Roderick Bloem, Damien Couroussé, Karine Heydemann, Mathieu Jan, Stefan Mangard
Publikováno v:
Transactions on Cryptographic Hardware and Embedded Systems, Vol 2024, Iss 4 (2024)
Fault injection attacks are a serious threat to system security, enabling attackers to bypass protection mechanisms or access sensitive information. To evaluate the robustness of CPU-based systems against these attacks, it is essential to analyze the
Externí odkaz:
https://doaj.org/article/4f530bf376ec46b3bb26d08fdd69f770
Publikováno v:
2022 20th ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE).
Publikováno v:
2022 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)
FTDC 2022-Workshop on Fault Detection and Tolerance in Cryptography
FTDC 2022-Workshop on Fault Detection and Tolerance in Cryptography, Sep 2022, Virtual event, Italy. pp.73-83, ⟨10.1109/FDTC57191.2022.00017⟩
FTDC 2022-Workshop on Fault Detection and Tolerance in Cryptography
FTDC 2022-Workshop on Fault Detection and Tolerance in Cryptography, Sep 2022, Virtual event, Italy. pp.73-83, ⟨10.1109/FDTC57191.2022.00017⟩
International audience; This paper introduces a formal workflow for modeling software/hardware systems in order to explore the effects of fault injections and evaluate the robustness to fault injection attacks. We illustrate this workflow on four ver
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6626ee928099fe011695b1d8d4e7769d
https://cea.hal.science/cea-03852138/file/FDTC22_Tollec_Exploration.pdf
https://cea.hal.science/cea-03852138/file/FDTC22_Tollec_Exploration.pdf
Publikováno v:
Proceedings of the 23rd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems.
Publikováno v:
RTNS 2022: The 30th International Conference on Real-Time Networks and Systems
RTNS 2022: The 30th International Conference on Real-Time Networks and Systems, Jun 2022, Paris France, France. pp.140-150, ⟨10.1145/3534879.3534907⟩
RTNS 2022: The 30th International Conference on Real-Time Networks and Systems, Jun 2022, Paris France, France. pp.140-150, ⟨10.1145/3534879.3534907⟩
International audience
Publikováno v:
International Journal on Software Tools for Technology Transfer
International Journal on Software Tools for Technology Transfer, 2022, 24 (3), pp.415-440. ⟨10.1007/s10009-022-00655-1⟩
International Journal on Software Tools for Technology Transfer, 2022, 24 (3), pp.415-440. ⟨10.1007/s10009-022-00655-1⟩
International audience
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::083f33e98aba9e11deb3616f59abb0f5
https://telecom-paris.hal.science/hal-03702426
https://telecom-paris.hal.science/hal-03702426
Publikováno v:
2022 IEEE 28th Real-Time and Embedded Technology and Applications Symposium (RTAS).
Publikováno v:
RTCSA
Correctness is an important concern during the development of real-time systems. In addition to the functional correctness, the timing behavior is often formally verified in order to ensure that correct results are delivered in-time for all possible
Publikováno v:
Jan, M, Asavoae, M, Schoeberl, M & Lee, E A 2020, Formal Semantics of Predictable Pipelines: a Comparative Study . in Proceedings of the 25th Asia and South Pacific Design Automation Conference . IEEE, 25th Asia and South Pacific Design Automation Conference, Beijing, China, 13/01/2020 . https://doi.org/10.1109/ASP-DAC47756.2020.9045351
ASP-DAC
ASP-DAC
Computer architectures used in safety-critical domains are subjected to worst-case execution time analysis. The presence of performance-driven microarchitectures may trigger undesired timing phenomena, called timing anomalies, and complicate the timi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::99327f2b15d148eaf630a8f66b3cd447
https://orbit.dtu.dk/en/publications/ea3d0d25-efff-47f0-a04a-525703b6153a
https://orbit.dtu.dk/en/publications/ea3d0d25-efff-47f0-a04a-525703b6153a
Publikováno v:
Cyber Physical Systems. Model-Based Design ISBN: 9783030411305
Timing analysis of safety-critical systems derives timing bounds of applications, or software (SW), executed on dedicated platforms, or hardware (HW). The ensemble HW–SW features, from a timing perspective, two different types of computation – a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b4c64a8f115bec3c69e61a6a4a4c2b4
https://doi.org/10.1007/978-3-030-41131-2_10
https://doi.org/10.1007/978-3-030-41131-2_10