Zobrazeno 1 - 10
of 52
pro vyhledávání: '"Michalis D. Galanis"'
Publikováno v:
Microprocessors and Microsystems. 33:91-105
Coarse grain reconfigurable array architectures have become increasingly popular due to their flexibility, scalability and performance. However, the mapping of programs on these architectures is characterized by huge complexity. This work presents a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f8c38d3045ab80df77c731edf477961
https://doi.org/10.1016/j.micpro.2008.07.002
https://doi.org/10.1016/j.micpro.2008.07.002
Publikováno v:
The Journal of Supercomputing. 48:115-151
Coarse Grain Reconfigurable Array (CGRA) architectures have been extensively used for accelerating time consuming loops. The design of such systems requires good balance between the architecture abilities and the loops' characteristics. A reliable de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1365aaa034a554bec6f439fe6075e371
https://doi.org/10.1007/s11227-008-0208-y
https://doi.org/10.1007/s11227-008-0208-y
Autor:
Costas E. Goutis, Michalis D. Galanis
Publikováno v:
Journal of Systems Architecture. 54:479-490
In this paper, an embedded system that extends microprocessor cores with a high-performance coarse-grained reconfigurable data-path is introduced. The data-path have been previously introduced by the authors. It is composed by computational resources
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f040c6f8d7bf1e9786483d7effa7fbbf
https://doi.org/10.1016/j.sysarc.2007.08.003
https://doi.org/10.1016/j.sysarc.2007.08.003
Autor:
Constantinos E. Goutis, G. Selimis, Harris E. Michail, Michalis D. Galanis, Dimitrios Schinianakis
Publikováno v:
Journal of Computer Systems, Networks, and Communications, Vol 2008 (2008)
A new algorithm for producing message authenticating codes (MACs) was recently proposed by NIST. The MAC protects both a message's integrity—by ensuring that a different MAC will be produced if the message has changed—as well as its authenticity
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d0b8f243642a32a81bfadc14f654530a
https://doi.org/10.1155/2008/923079
https://doi.org/10.1155/2008/923079
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15:1362-1366
This paper presents performance improvements and energy savings from mapping real-world benchmarks on an embedded single-chip platform that includes coarse-grained reconfigurable logic with a microprocessor. The reconfigurable hardware is a 2-D array
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fb33bfa470d4af17f34555bb24abe38
https://doi.org/10.1109/tvlsi.2007.909812
https://doi.org/10.1109/tvlsi.2007.909812
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 12:1-22
This article presents the speedups achieved in a generic single-chip microprocessor system by employing a high-performance datapath. The datapath acts as a coprocessor that accelerates computational-intensive kernel sections thereby increasing the ov
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5da12c314d3c8ac1b54d7f9ad7ab73f8
https://doi.org/10.1145/1255456.1255472
https://doi.org/10.1145/1255456.1255472
Publikováno v:
Journal of Signal Processing Systems. 50:179-200
The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a coprocessor that accelerates computational intensive kernel sections there
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c50d88137b28564ae09512f347922796
https://doi.org/10.1007/s11265-007-0097-y
https://doi.org/10.1007/s11265-007-0097-y
Publikováno v:
The Journal of Supercomputing. 39:251-271
The speedups achieved in a generic microprocessor system by employing a high-performance data-path are presented. The data-path acts as a coprocessor that accelerates time critical code segments, called kernels, thereby increasing the overall perform
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::56ab20f85dcfae364d70e38e547904f3
https://doi.org/10.1007/s11227-006-0007-2
https://doi.org/10.1007/s11227-006-0007-2
Publikováno v:
The Journal of Supercomputing. 40:127-157
Several mesh-like coarse-grained reconfigurable architectures have been devised in the last few years accompanied with their corresponding mapping flows. One of the major bottlenecks in mapping algorithms on these architectures is the limited memory
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::28834deb0c1bc05c4a23cb793e5941a4
https://doi.org/10.1007/s11227-006-0016-1
https://doi.org/10.1007/s11227-006-0016-1
Publikováno v:
Journal of Circuits, Systems and Computers. 15:817-831
In this paper, we present two alternative architectures and FPGA implementations of the 64-bit NESSIE proposal, MISTY1 block cipher. The first architecture is suitable for applications with high-performance requirements. A throughput of up to 12.6 Gb
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6d5ff04503df7841e45957edf6303a36
https://doi.org/10.1142/s0218126606003362
https://doi.org/10.1142/s0218126606003362