Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Michael D. Steigerwalt"'
Autor:
Trejo Rust, David McCarthy, Min Dai, Michael Brodfuehrer, Lingjie Wang, Colleen Meagher, Bruce Dyer, Raymond Van Roijen, Michael D. Steigerwalt, Javier Ayala, Gasner Barthold, Jeffery B. Maxson, Randal Bakken
Publikováno v:
2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
A small but persistent signal in wafer slot order was observed at functional test, affecting logic yield. Through wafer slot Randomization at several operations in the route a process step within high-k metal gate formation was suspected to be causin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e03472cd16acdc49d18a862775295e23
https://doi.org/10.1109/asmc.2017.7969251
https://doi.org/10.1109/asmc.2017.7969251
Autor:
Susan G. Conti, Pratik P. Joshi, Michael D. Steigerwalt, Paul F. Findeis, William Brennan, Raymond Van Roijen, Dane Bailey, Javier Ayala
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 27:364-369
Nitrogen purge of wafer carriers is driving defect density reduction at critical process steps. We discuss several examples of defect creation related to the environment of the semiconductor wafer and how nitrogen purge of carriers improves defect de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39efff4c55c2171875fe526c2f507e09
https://doi.org/10.1109/tsm.2014.2337282
https://doi.org/10.1109/tsm.2014.2337282
Autor:
Eric C. Harley, Alyssa Herbert, Anda Mocuta, Michael D. Steigerwalt, Colleen M. Snavely, Michael Brodfuehrer, Raymond Van Roijen, Meghan Linskey, Mohammed Fazil Fayaz
Publikováno v:
25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014).
Embedded SiGe, used to boost pFET performance, is grown by selective epitaxy on silicon. Pattern density effects cause the deposited thickness to be different across different product chips under otherwise identical conditions. Since device control d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4d127626d48654bd651fe6c6da651f98
https://doi.org/10.1109/asmc.2014.6846982
https://doi.org/10.1109/asmc.2014.6846982
Autor:
Michael D. Steigerwalt, Timothy J. McArdle, Ming Dai, Saiqa Farhat, Dawei Hu, Srinivasan Rangarajan
Publikováno v:
25th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2014).
In this paper we report the effectiveness of optical ellipsometry in measuring thickness and Germanium % of channel SiGe on SOI substrate used in advanced node high performance semiconductor devices. Keywords—cSiGe, Ellipsometry, Thickness, Ge Conc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e348cd9d81d37fd6d84936f0b4cda571
https://doi.org/10.1109/asmc.2014.6846974
https://doi.org/10.1109/asmc.2014.6846974
Autor:
D. K. Sadana, Christopher D. Sheraw, Bala S. Haran, Xinhui Wang, Omer H. Dokumaci, Chun-Yung Sung, Michael D. Steigerwalt, Dechao Guo, Jeffrey W. Sleight, Philip J. Oldiges, Shreesh Narasimha, Mukesh Khare, David M. Fried, Wilfried Haensch, D.V. Singh, Isaac Lauer
Publikováno v:
2006 International Electron Devices Meeting.
Starting with the 45 nm node, a tradeoff between performance and density exists that will become more severe at the 32 nm node. An in-depth analysis of the impact of pitch and increased parasitics on device performance in the 32 nm node is presented.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::04ac0b86b275c7be5a6eb030def0db34
https://doi.org/10.1109/iedm.2006.346881
https://doi.org/10.1109/iedm.2006.346881
Autor:
C.E. Schiller, B. Walsh, Herbert L. Ho, S.S. Iyer, Mahender Kumar, B. Messenger, D. Wildrick, Michael D. Steigerwalt, Karen A. Bard, T.L. Doney, P.A. McFarland, S.E. Rathmill, Paul C. Parries, S.E. Chaloux, A. Gasasira, David M. Dobuzinsky
Publikováno v:
IEEE International Electron Devices Meeting 2003.
This paper, for the first time, reports a fully-functional 130 nm trench-based eDRAM (embedded DRAM), built in unpatterned SOI. The functionality of the eDRAM is shown by the test results of: (a) 524 Kb ADM (array diagnostic monitors) macros and (b)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e40b25e57cd6b3a83f4bdd13aec864a2
https://doi.org/10.1109/iedm.2003.1269312
https://doi.org/10.1109/iedm.2003.1269312
Autor:
D. Wildrick, J. Benedict, Michael D. Steigerwalt, D. K. Sadana, B. Walsh, Herbert L. Ho, P.A. McFarland, T.L. Doney, Karen A. Bard, S.L. Maurer, J.D. Lee, D. Pendleton, B. Corrow
Publikováno v:
International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).
Reports the successful implementation of a 0.13 /spl mu/m high-performance, silicon-on-insulator (SOI) logic technology to produce a 0.13 /spl mu/m logic-based embedded DRAM (eDRAM) on substrates composed of both bulk Si and SOI or pattern SOI. eDRAM
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ad4cab64541b847054b3574569e84057
https://doi.org/10.1109/iedm.2001.979555
https://doi.org/10.1109/iedm.2001.979555