Zobrazeno 1 - 10
of 33
pro vyhledávání: '"Michał Melosik"'
Publikováno v:
Entropy, Vol 25, Iss 7, p 976 (2023)
This paper presents a prototype wearable Cryptographically Secure PseudoRandom Bit Generator CSPRBG (wearable CSPRBG). A vest prototype has been fabricated to which an evaluation board with a ZYBO (ZYnq BOard) Zynq Z-7010 has been mounted using tailo
Externí odkaz:
https://doaj.org/article/4f570632b3b243668d71300a437af5bd
Publikováno v:
Entropy; Volume 25; Issue 7; Pages: 976
This paper presents a prototype wearable Cryptographically Secure PseudoRandom Bit Generator CSPRBG (wearable CSPRBG). A vest prototype has been fabricated to which an evaluation board with a ZYBO (ZYnq BOard) Zynq Z-7010 has been mounted using tailo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=multidiscipl::a0a4d4bbe36262ee97c3b7c5f821e551
Autor:
Wieslaw Marszalek, Michał Melosik
Publikováno v:
IEEE Access, Vol 9, Pp 161846-161853 (2021)
This paper deals with a safety problem of entropy sources in deterministic random bit generators. An initialization input attack on a set of two pseudo-random generators using analog-digital hardware Trojan is presented. Trojan circuit implementation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::14bc64b66f2e74523ff27fdd7ccdf3bd
https://doi.org/10.1109/access.2021.3131969
https://doi.org/10.1109/access.2021.3131969
Autor:
Michał Melosik, Wieslaw Marszalek
Publikováno v:
Electronics, Vol 11, Iss 272, p 272 (2022)
Electronics; Volume 11; Issue 2; Pages: 272
Electronics; Volume 11; Issue 2; Pages: 272
We discuss chaos and its quality as measured through the 0-1 test for chaos. When the 0-1 test indicates deteriorating quality of chaos, because of the finite precision representations of real numbers in digital implementations, then the process may
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ef5b81cda740f3b98d2832f784ea93fe
https://www.mdpi.com/2079-9292/11/2/272
https://www.mdpi.com/2079-9292/11/2/272
Publikováno v:
Electronics; Volume 11; Issue 9; Pages: 1497
This paper presents a system for the remote design and testing of electronic circuits and devices with FPGAs during COVID-19 and similar lockdown periods when physical access to laboratories is not permitted. The system is based on the application of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::36c4bf7be582e23b74b9289ec7451744
https://doi.org/10.3390/electronics11091497
https://doi.org/10.3390/electronics11091497
Publikováno v:
Bulletin of the Polish Academy of Sciences Technical Sciences. 65:725-732
The paper deals with the security problems in chaotic-based cryptography. In particular, the 0–1 test for chaos is used to detect hardware Trojans in electronic circuits – generators of chaotic bit sequences. The proposed method of detecting hard
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9686d70df7a0db7f546f925fc3b09fe2
https://doi.org/10.1515/bpasts-2017-0078
https://doi.org/10.1515/bpasts-2017-0078
Autor:
Michał Melosik, Wieslaw Marszalek
Publikováno v:
Bulletin of the Polish Academy of Sciences Technical Sciences. 64:521-528
In this paper we discuss in detail the resonance and oversampling features of the 0/1 test for chaos in continuous systems and propose methods to avoid those undesired features. Our method is based on certain frequency properties of the 0/1 test. Whe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e69e22f759c81fb9a33aca7e672c8fcc
https://doi.org/10.1515/bpasts-2016-0058
https://doi.org/10.1515/bpasts-2016-0058
Publikováno v:
ELEKTRONIKA - KONSTRUKCJE, TECHNOLOGIE, ZASTOSOWANIA. 1:26-28
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::541c7c8d8adf5a5b03e30356884d8a8a
https://doi.org/10.15199/13.2017.10.6
https://doi.org/10.15199/13.2017.10.6
Publikováno v:
PRZEGLĄD ELEKTROTECHNICZNY. 1:186-189
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::734191cccc4528ec0ab7813dd077837e
https://doi.org/10.15199/48.2015.09.48
https://doi.org/10.15199/48.2015.09.48
Autor:
Piotr Katarzyński, Mariusz Naumowicz, Marek Kropidłowski, Michał Melosik, Andrzej Handkiewicz, Szymon Szczęsny, Pawel Sniatala
Publikováno v:
Expert Systems with Applications. 42:3205-3218
The paper presents automatic layout generation of analog current mode circuits.Chip area, power consumption and speed operation is controlled.An experimental chip was fabricated in CMOS technology.The chip was tested in the environment based on FPGA.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b5730a581c306f87cc3f58ed434cfdf2
https://doi.org/10.1016/j.eswa.2014.11.048
https://doi.org/10.1016/j.eswa.2014.11.048