Zobrazeno 1 - 10
of 70
pro vyhledávání: '"Mi-Chang Chang"'
Publikováno v:
Microelectronics Reliability. 84:48-54
In the output stage of power ICs, large array devices (LAD) of MOSFETs are usually used to drive a considerable amount of current. Electrostatic discharge (ESD) self-protection capability of LAD is also required. ESD layout rules are usually adopted
Autor:
Mi-Chang Chang, Hung-Wei Chen
Publikováno v:
Microelectronics Reliability. 74:110-117
Large array devices (LAD) of MOSFETs are needed in most power ICs. NMOS transistors are used in current sinking while PMOS in current driving. Unlike the NMOS transistors, the high voltage PMOS transistors (HVPMOS) electrostatic discharge (ESD) self-
Publikováno v:
2017 International Conference on Electron Devices and Solid-State Circuits (EDSSC).
Since large array devices of MOSFETs are huge for driving capabilities, ESD self protections are also required. Then, the large drain-contact-to-poly-gate-spacing layout rule is usually adopted with large layout areas. In this paper, a new control ci
Autor:
Lee-Chung Lu, Chih-Sheng Chang, Meikei Ieong, Chih-Ping Chao, Ken-Ichi Goto, Carlos H. Diaz, Mi-Chang Chang
Publikováno v:
IEEE Transactions on Electron Devices. 55:84-95
CMOS-technology scaling has moved to a power-constrained condition regardless of the application segments. Power management in advanced CMOS technology drives the need to conciliate scaling-driven fundamental material limitations with product and app
Autor:
Chien-Chun Tsai, Mi-Chang Chang, Wen-De Wang, Yean-Kuen Fang, Shen Tu, Mark Chen, Chung-Hui Chen
Publikováno v:
Solid-State Electronics. 47:865-871
A new high voltage tolerant (HVT) electro-static discharge (ESD) design adopts one forward biased P+/N-well diode in series of one stacked NMOS, called the diode-stacked NMOS, is proposed to reduce the total capacitance and maintain the high ESD perf
Publikováno v:
IEEE Journal of Solid-State Circuits. 38:444-449
Several physical phenomena in highly scaled CMOS technology have now become first-order elements affecting the electrical behavior of transistor characteristics. Effects such as STI mechanical stress, direct tunneling in gate dielectrics, gate line-e
Autor:
Richard San Martin, Shawn Walsh, K. Scott Wills, F. Scott Johnson, Ken Harvey, Stan Ashburn, Vladimir A. Ukraintsev, Hal Edwards, Philip Menz, Mi-Chang Chang
Publikováno v:
Journal of Applied Physics. 87:1485-1495
The scanning capacitance microscope (SCM) is a carrier-sensitive imaging tool based upon the well-known scanning-probe microscope (SPM). As reported in Edwards et al. [Appl. Phys. Lett. 72, 698 (1998)], scanning capacitance spectroscopy (SCS) is a ne
Autor:
W. Liu, Mi-Chang Chang
Publikováno v:
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications. 45:416-422
We examine two assumptions commonly used in analytical studies of inverter transient performances, that the transcapacitive current during a transient and the distributive gate resistance are negligible. We derive the additional delay time expression
Publikováno v:
IEEE Circuits and Devices Magazine. 13:7-10
The design and optimization of ESD protection circuits is greatly enhanced by the ability to perform circuit-level simulations of the protection circuits and the I/O buffers. Most available simulators do not cover the high current region of the circu
Autor:
J.A. Seitchik, Ajith Amerasekera, K. Mayaram, Mi-Chang Chang, J.-H. Chern, Amitava Chatterjee
Publikováno v:
IEEE Transactions on Electron Devices. 40:1836-1844
Investigates the effects of self-heating on the high current I-V characteristics of semiconductor structures using a fully coupled electrothermal device simulator. It is shown that the breakdown in both resistors and diodes is caused by conductivity