Zobrazeno 1 - 10
of 789
pro vyhledávání: '"Memory rank"'
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Akademický článek
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Autor:
Yan, Longhao1 (AUTHOR), Wu, Qingyu2 (AUTHOR), Li, Xi2 (AUTHOR), Xie, Chenchen2 (AUTHOR), Zhou, Xilin2 (AUTHOR), Li, Yuqi1 (AUTHOR), Shi, Daijing1 (AUTHOR), Yu, Lianfeng1 (AUTHOR), Zhang, Teng1 (AUTHOR), Tao, Yaoyu1,3 (AUTHOR), Yan, Bonan1,3 (AUTHOR), Zhong, Min4 (AUTHOR), Song, Zhitang2 (AUTHOR) ztsong@mail.sim.ac.cn, Yang, Yuchao1,3,5,6 (AUTHOR) yuchaoyang@pku.edu.cn, Huang, Ru1,3 (AUTHOR) ruhuang@pku.edu.cn
Publikováno v:
Advanced Functional Materials. 4/21/2024, Vol. 34 Issue 15, p1-10. 10p.
Akademický článek
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Publikováno v:
ACM Transactions on Architecture and Code Optimization. 9:1-28
VLSI process technology scaling has enabled dramatic improvements in the capacity and peak bandwidth of DRAM devices. However, current standard DDR x DIMM memory interfaces are not well tailored to achieve high energy efficiency and performance in mo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c0589b91e0d6c0cd6bba6c4b36b4f4e6
https://doi.org/10.1145/2133382.2133386
https://doi.org/10.1145/2133382.2133386
Autor:
Yan, Longhao, Wu, Qingyu, Li, Xi, Xie, Chenchen, Zhou, Xilin, Li, Yuqi, Shi, Daijing, Yu, Lianfeng, Zhang, Teng, Tao, Yaoyu, Yan, Bonan, Zhong, Min, Song, Zhitang, Yang, Yuchao, Huang, Ru
Publikováno v:
Advanced Functional Materials; 4/21/2024, Vol. 34 Issue 15, p1-1, 1p
Autor:
Nagi Mekhiel
Publikováno v:
IEEE Access, Vol 4, Pp 1073-1085 (2016)
The increase in processor speed achieved by continuous improvements in technology is causing major obstacles to the parallel processors implemented inside the chip. The time spent in servicing all the cache misses from all processors from a slow shar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9707809215befd5c7926517fcf57f4d1
https://doi.org/10.32920/21463020
https://doi.org/10.32920/21463020
Autor:
Wooyoung Jang
Publikováno v:
IEEE Transactions on Circuits and Systems for Video Technology. 28:3527-3538
The state-of-the-art mobile image and graphic applications demand not only a lot of computing power, but also high-quality memory services. Moreover, depending on the screen orientations of mobile systems, image and graphic data can be accessed in a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07089fe5cebe4447aa46367d15f164f1
https://doi.org/10.1109/tcsvt.2017.2715062
https://doi.org/10.1109/tcsvt.2017.2715062
Publikováno v:
IEEE Transactions on Computers. 67:32-44
For future exascale computing systems, ultra-high-density memories would be required that consume low power to process massive data. Of the various memory devices, 3D-stacked DRAMs using TSVs are a perfect solution for this purposes. In addition to p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fb335ada2e8b066f8a7e0ba91f5b6616
https://doi.org/10.1109/tc.2017.2723392
https://doi.org/10.1109/tc.2017.2723392
Autor:
Stefan Dietrich, Marcos Alvarez Gonzalez, Milena Ivanov, Mani Balakrishnan, Michael Richter, Filippo Vitale, Jorg Weller, Wolfgang Spirkl, Ralf Oliver Seitter, Sven Piatkowski, Jens Polney, Peter Pfefferl, Cristian Chetreanu, Manfred Plan, Marc Walter, Daniel Lauber, Eugen Huber, Stephan Rau, Swetha Padaraju, Thomas Hein, Maksim Kuzmenka, Martin Broschwitz, Jan Pottgiesser, Martin Brox, Ronny Schneider, Fabien Funfrock, Christian N. Mohr, Juan Ocon Garrido
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:134-143
The graphic DRAM interface standard GDDR5X is developed as an evolutionary extension to the widely available GDDR5. The implementation presented here achieves a data rate of 12 Gb/s/pin on a single-ended signaling interface with 32 IOs for a total me
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6f1ac33fd7c18539aa948a4a0775950d
https://doi.org/10.1109/jssc.2017.2737945
https://doi.org/10.1109/jssc.2017.2737945