Zobrazeno 1 - 10
of 47
pro vyhledávání: '"Melot, Nicolas"'
Autor:
Melot, Nicolas
The rise of many-core processor architectures in the market answers to a constantly growing need of processing power to solve more and more challenging problems such as the ones in computing for big data. Fast computation is more and more limited by
Externí odkaz:
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-132308
Autor:
Saeedi, Sajad, Bodin, Bruno, Wagstaff, Harry, Nisbet, Andy, Nardi, Luigi, Mawer, John, Melot, Nicolas, Palomar, Oscar, Vespa, Emanuele, Spink, Tom, Gorgovan, Cosmin, Webb, Andrew, Clarkson, James, Tomusk, Erik, Debrunner, Thomas, Kaszyk, Kuba, Gonzalez-de-Aledo, Pablo, Rodchenko, Andrey, Riley, Graham, Kotselidis, Christos, Franke, Björn, O'Boyle, Michael F. P., Davison, Andrew J., Kelly, Paul H. J., Luján, Mikel, Furber, Steve
Visual understanding of 3D environments in real-time, at low power, is a huge computational challenge. Often referred to as SLAM (Simultaneous Localisation and Mapping), it is central to applications spanning domestic and industrial robotics, autonom
Externí odkaz:
http://arxiv.org/abs/1808.06352
Autor:
Melot, Nicolas.
Texte remanié de: Th. Doct.--Droit--Paris 2, 2002.
Bibliogr. p. 857-928. Index.
Bibliogr. p. 857-928. Index.
Externí odkaz:
http://catalogue.bnf.fr/ark:/12148/cb391465938
Publikováno v:
In Procedia Computer Science 2012 9:1890-1899
Improving Energy-Efficiency of Static Schedules by Core Consolidation and Switching Off Unused Cores
We demonstrate how static, energy-efficient schedules for independent, parallelizable tasks on parallel machines can be improved by modeling idle power if the static power consumption of a core comprises a notable fraction of the core's total power,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od_______261::0a6ae5e53318ae2ef679f9474e31bca2
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-145203
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-145203
Autor:
Melot, Nicolas
Publikováno v:
Revue Fiscale du Patrimoine
Revue Fiscale du Patrimoine, LexisNexis, 2016, 3
Revue fiscale du patrimoine
Revue fiscale du patrimoine, 2016, 3
Revue Fiscale du Patrimoine, LexisNexis, 2016, 3
Revue fiscale du patrimoine
Revue fiscale du patrimoine, 2016, 3
National audience; no abstract
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::5fbece76f33f5ed50bf471702ef86aaf
https://hal-univ-rennes1.archives-ouvertes.fr/hal-01540298
https://hal-univ-rennes1.archives-ouvertes.fr/hal-01540298
Autor:
Melot, Nicolas
Publikováno v:
Revue de droit fiscal ex droit fiscal
Revue de droit fiscal ex droit fiscal, 2013, 24
Revue de droit fiscal
Revue de droit fiscal, 2013, 24
Revue de droit fiscal ex droit fiscal, 2013, 24
Revue de droit fiscal
Revue de droit fiscal, 2013, 24
National audience; no abstract
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::b04b5f50785d8bef6482904e88c85b98
https://hal-univ-rennes1.archives-ouvertes.fr/hal-01540299
https://hal-univ-rennes1.archives-ouvertes.fr/hal-01540299
Performance of manycore processors is limited by programs' use of off-chip main memory. Streaming computation organized in a pipeline limits accesses to main memory to tasks at boundaries of the pipeline to read or write to main memory. The Single Ch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::386d92f2bf53cdbaffd0c8d0e36dbeb6
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-93421
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-93421
Autor:
Melot, Nicolas
Publikováno v:
Revue de droit fiscal ex droit fiscal
Revue de droit fiscal ex droit fiscal, 2012, 51, pp.15
Revue de droit fiscal
Revue de droit fiscal, 2012, 51, pp.15
Revue de droit fiscal ex droit fiscal, 2012, 51, pp.15
Revue de droit fiscal
Revue de droit fiscal, 2012, 51, pp.15
Etude 562; National audience; no abstract
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::3f300d898a4d08ee9a58b8f88836ccae
https://hal-univ-rennes1.archives-ouvertes.fr/hal-01540300
https://hal-univ-rennes1.archives-ouvertes.fr/hal-01540300
The Single-Chip Cloud Computer (SCC) is an experimental processor created by Intel Labs. It comprises 48 x86 cores linked by an on-chip high performance network, as well as four DDR3 memory controllers to access an off-chip main memory of up to 64GiB
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::77e13a04d152c0ebbb92a8d8fb94b9f6
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-93423
http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-93423