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Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28:1185-1194
A two-stage successive approximation register analog-to-digital converter (ADC) is reported. The power consumption is reduced by a technique, which combines the charge sharing passive residue transfer and the $V_{\mathrm {cm}}$ -based switching metho
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::042579315153375412b973a8d412db37
https://doi.org/10.1109/tvlsi.2020.2974573
https://doi.org/10.1109/tvlsi.2020.2974573
