Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Megan Wachs"'
Autor:
Rolando Torres, Krste Asanovic, Felipe Flechas, Laude Fernandez, Camilo Rojas, Megan Wachs, Alex Mantilla, Julian Arenas, Hanssel Morales, Juan Sebastian Moya, Juan Sebastián Sánchez Gómez, Andres Amaya, Ckristian Duran, Wilmer Ramirez, Javier Ardila, E G Luis Rueda, Elkim Roa, Hector Gomez, Jack Kang, Albert Huntington, Juan Eduardo Romero
Publikováno v:
CICC
Reported work on minimum-energy (ME) computing for low-power applications has focused entirely on tracking solely the microprocessor ME voltage supply. However, the use of low-power systems requires accounting for regulator losses, voltage monitors,
Autor:
Megan Wachs, Mark Horowitz, Benjamin C. Lee, Christos Kozyrakis, Wajahat Qadeer, Alex Solomatnikov, Omid Azizi, Rehan Hameed, Stephen Richardson
Publikováno v:
Communications of the ACM. 54:85-93
Scaling the performance of a power limited processor requires decreasing the energy expended per instruction executed, since energy/op * op/second is power. To better understand what improvement in processor efficiency is possible, and what must be d
Autor:
Omid Azizi, Mark Horowitz, Megan Wachs, Ofer Shacham, Kyle Kelley, John P. Stevenson, Zain Asgar, Wajahat Qadeer, Benjamin C. Lee, Stephen Richardson, Alex Solomatnikov, Amin Firoozshahian
Publikováno v:
IEEE Micro. 30:9-24
Because of technology scaling, power dissipation is today's major performance limiter. Moreover, the traditional way to achieve power efficiency, application-specific designs, is prohibitively expensive. These power and cost issues necessitate rethin
Publikováno v:
ACM SIGBED Review. 4:13-18
We argue that the principal cause of sensornet deployment and development difficulty is an inability to observe a network's internal operation. We further argue that this lack of visibility is due to the activity and resource constraints enforced by
Autor:
Megan Wachs, Daniel Ip
Publikováno v:
DAC
Traditional IP design faces challenges imposed by performance requirements, power and area budgets, and cost and time-to-market limitations. The design, verification, and integration of security IP introduces additional challenges due to the need to
Publikováno v:
Advanced Information Systems Engineering ISBN: 9783642387081
CHES
CHES
Masking is a popular countermeasure against differential power analysis DPA and other side-channel attacks. When designing integrated circuits to resist DPA, masking at the logic gate level has the benefit that it can be implemented without considera
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f05751a26e0535dcfe073448567800a
https://doi.org/10.1007/978-3-662-44709-3_32
https://doi.org/10.1007/978-3-662-44709-3_32
Autor:
Megan Wachs, Ioana Carcea, Daniel B. Polley, Natalya Zaika, Bryan A. Seybold, Kexin Yuan, Robert C. Froemke, Philip Levis, Christoph E. Schreiner, Ana Raquel O. Martins, Hannah L. Bernstein, Michael M. Merzenich, Alison J. Barker
Publikováno v:
Nature neuroscience, vol 16, iss 1
Froemke, RC; Carcea, I; Barker, AJ; Yuan, K; Seybold, BA; Martins, ARO; et al.(2013). Long-term modification of cortical synapses improves sensory perception. Nature Neuroscience, 16(1), 79-88. doi: 10.1038/nn.3274. UC San Francisco: Retrieved from: http://www.escholarship.org/uc/item/88d0k8kh
Nat. Neurosci.
Nature neuroscience
Froemke, RC; Carcea, I; Barker, AJ; Yuan, K; Seybold, BA; Martins, ARO; et al.(2013). Long-term modification of cortical synapses improves sensory perception. Nature Neuroscience, 16(1), 79-88. doi: 10.1038/nn.3274. UC San Francisco: Retrieved from: http://www.escholarship.org/uc/item/88d0k8kh
Nat. Neurosci.
Nature neuroscience
Synapses and receptive fields of the cerebral cortex are plastic. However, changes to specific inputs must be coordinated within neural networks to ensure that excitability and feature selectivity are appropriately configured for perception of the se
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d23a5dbb1fdb3f174763f0e6f6069898
https://escholarship.org/uc/item/88d0k8kh
https://escholarship.org/uc/item/88d0k8kh
Autor:
Sameh Galal, Sabarish Sankaranarayanan, Andrew Danowitz, Ofer Shacham, Mark Horowitz, Wajahat Qadeer, John Brunhaver, Megan Wachs, Stephen Richardson, Artem Vassiliev
Publikováno v:
DAC
Technology scaling has created a catch-22: technology now can do almost anything we want, but the NRE design costs are so high, that almost no one can afford to use it. Our current situation is reminiscent of the 1980's, when only a few companies cou
Publikováno v:
DAC
Hardware modules would be much easier to reuse if they supported generic flexible high-level interfaces. However, these interfaces are rarely used since they lead to timing and area overheads compared to a customized design. This paper describes a re
Publikováno v:
DATE
Creating parameterized “chip generators” has been proposed as one way to decrease chip NRE costs. While many approaches are available for creating or generating flexible data path elements, the design of flexible controllers is more problematic.