Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Mauricio Altieri"'
Publikováno v:
Solid-State Electronics. 117:138-145
Some years ago, UTBB FDSOI has appeared in the horizon of low-power circuit designers. With the 14 nm and 10 nm nodes in the road-map, the industrialized 28 nm platform promises highly efficient designs with Ultra-Wide Voltage Range (UWVR) thanks to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd947fd307ac04f0387a8c441b09cab3
https://doi.org/10.1016/j.sse.2015.11.019
https://doi.org/10.1016/j.sse.2015.11.019
Publikováno v:
DFT
Integrated circuits' aging is recognized as a key reliability bottleneck and its estimation at design time becomes mandatory to guarantee performance and lifetime of the circuit. Current approaches for the estimation of aging rely on simulation tools
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6bdbe27775a04027a8a59b39e9446f2
https://doi.org/10.1109/dft.2017.8244451
https://doi.org/10.1109/dft.2017.8244451
Publikováno v:
IEEE International Reliability Physics Symposium
IEEE International Reliability Physics Symposium, Apr 2017, Monterey, United States. ⟨10.1109/IRPS.2017.7936355⟩
IEEE International Reliability Physics Symposium, Apr 2017, Monterey, United States. ⟨10.1109/IRPS.2017.7936355⟩
International audience; This work proposes a new bottom-up approach for on-line estimation of circuit performance loss due to BTI/HCI effects. Built on the top of device-level models, it takes into account all factors that impact global circuit aging
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9ffa4090f1df8feab52452410a1d8087
https://hal-cea.archives-ouvertes.fr/cea-01571643/file/IRPS_17f_v02.pdf
https://hal-cea.archives-ouvertes.fr/cea-01571643/file/IRPS_17f_v02.pdf
Publikováno v:
IEEE Transactions on Nuclear Science. 60:2805-2812
This paper presents HETA, a hybrid technique based on assertions and a non-intrusive enhanced watchdog module to detect SEE faults in microprocessors. These types of faults have a major influence in the microprocessor's control flow, causing incorrec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::50cfa264dbca7137eda59614bfb37436
https://doi.org/10.1109/tns.2013.2246798
https://doi.org/10.1109/tns.2013.2246798
Publikováno v:
NEWCAS
This work proposes a new method for measuring the performance loss of a processor due to aging (BTI and HCI). It is designed for any adaptive system incorporating in-situ delay monitors and local temperature sensors. To validate it, we developed a si
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6d8968a48b38322600684ed53f666760
https://doi.org/10.1109/newcas.2016.7604809
https://doi.org/10.1109/newcas.2016.7604809
Publikováno v:
2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)
2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Sep 2015, Salvador, Brazil. pp.111-117, ⟨10.1109/PATMOS.2015.7347595⟩
PATMOS
2015 25th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Sep 2015, Salvador, Brazil. pp.111-117, ⟨10.1109/PATMOS.2015.7347595⟩
PATMOS
Conference of 25th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2015 ; Conference Date: 1 September 2015 Through 4 September 2015; Conference Code:117722; International audience; Power efficiency is a treme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5932f37a8b6c477c7e06751c69d0ed73
https://cea.hal.science/cea-01838141
https://cea.hal.science/cea-01838141
Publikováno v:
NEWCAS
Dynamic Voltage and Frequency Scaling (DVFS) is a very efficient way to manage performance/power trade-off in embedded systems. It consists in switching between low and high voltage-frequency operating points according to the required processing perf
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::040bdb0c7c15a8d9fff02641372f7e8c
https://doi.org/10.1109/newcas.2015.7182056
https://doi.org/10.1109/newcas.2015.7182056
Publikováno v:
PATMOS
During the last decade, Dynamic Voltage-Frequency Scaling (DVFS) techniques have been widely proposed to improve integrated circuit efficiency. When these mechanisms are composed of independent actuators for supply voltage and clock frequency, a pred
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ff45a6d8a7f96d97522a0561fb5dbe9b
https://doi.org/10.1109/patmos.2013.6662175
https://doi.org/10.1109/patmos.2013.6662175
Autor:
Jürgen Becker, Michael Hübner, Samuel Pagliarini, G. Foucard, Mauricio Altieri, Jose Rodrigo Azambuja, Raoul Velazco, Fernanda Lima Kastensmidt
Publikováno v:
IEEE Transactions on Nuclear Science
IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2012, 59 (4), pp.1117-1124. ⟨10.1109/TNS.2012.2201750⟩
IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2012, 59 (4), pp.1117-1124. ⟨10.1109/TNS.2012.2201750⟩
International audience; This paper presents a non-intrusive hybrid fault detection approach that combines hardware and software techniques to detect transient faults in microprocessors. Such faults have a major influence in microprocessor-based syste
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3ff8aa343b8c58e5290d7752652a75eb
https://hal.archives-ouvertes.fr/hal-00744240
https://hal.archives-ouvertes.fr/hal-00744240