Performance Evaluation of Components Using a Granularity-based Interface Between Real-Time Calculus and Timed Automata

Autor: Karine Altisen, Yanhong Liu, Matthieu Moy

Publikováno v: Electronic Proceedings in Theoretical Computer Science, Vol 28, Iss Proc. QAPL 2010, Pp 16-33 (2010)

To analyze complex and heterogeneous real-time embedded systems, recent works have proposed interface techniques between real-time calculus (RTC) and timed automata (TA), in order to take advantage of the strengths of each technique for analyzing var

Externí odkaz: https://doaj.org/article/8a790a190ff14edabc82523e306151c5

S4BXI: the MPI-ready Portals 4 Simulator

Autor: Matthieu Moy, Grégoire Pichon, Ludovic Henrio, Julien Emmanuel

Publikováno v: MASCOTS 2021-29th IEEE International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
MASCOTS 2021-29th IEEE International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, Nov 2021, Houston, United States. pp.1-8
MASCOTS
MASCOTS 2021-29th IEEE International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, Nov 2021, Houston, United States. pp.1-8, ⟨10.1109/MASCOTS53633.2021.9614285⟩

International audience; We present a simulator for High Performance Computing (HPC) interconnection networks. It models Portals 4, a standard low-level API for communication, and it allows running unmodified applications that use higher-level network

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9c5820be9c52dec9488a69e1633fc1a6
https://hal.inria.fr/hal-03366573/document

Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support

Autor: Gabriel Busnot, Nicolas Ventroux, Matthieu Moy, Tanguy Sassolas

Publikováno v: Integration, the VLSI Journal
Integration, the VLSI Journal, 2021, 79, pp.23-40. ⟨10.1016/j.vlsi.2020.12.006⟩
Integration, the VLSI Journal, Elsevier, 2021, 79, pp.23-40. ⟨10.1016/j.vlsi.2020.12.006⟩

International audience; To face the growing complexity of System-on-Chips (SoCs) and their tight time-to-market constraints, Virtual Prototyping (VP) tools based on SystemC/TLM2.0 must get faster while maintaining accuracy. However, the ASI SystemC r

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6250af8b74ed36f07f2e3d3c26a907a5
https://hal.science/hal-03487607/file/aspdac20-journal.pdf

Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core Systems

Autor: Maximilien Dupont de Dinechin, Matthieu Moy, Claire Maiza, Matheus Schuh

Publikováno v: DATE 2020-Design, Automation and Test in Europe Conference
DATE 2020-Design, Automation and Test in Europe Conference, Mar 2020, Grenoble, France. pp.1-4
DATE

In RTNS 2016, Rihani et al. [7] proposed an algorithm to compute the impact of interference on memory accesses on the timing of a task graph. It calculates a static, time-triggered schedule, i.e. a release date and a worst-case response time for each

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7108e6aa979024a42c7b320aee7718d5
https://hal.archives-ouvertes.fr/hal-02431273/document

Causality problem in real-time calculus

Autor: Matthieu Moy, Karine Altisen

Publikováno v: Formal Methods in System Design
Formal Methods in System Design, Springer Verlag, 2016, 48, pp.1-45. ⟨10.1007/s10703-016-0250-y⟩

Real-time calculus (RTC) (Thiele et al. in: ISCAS, Geneva, 2000) is a framework to analyze heterogeneous, real-time systems that process event streams of data. The streams are characterized by pairs of curves, called arrival curves, that express uppe

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::41f6c5ee9cfa207c426aeaa375930abc
https://doi.org/10.1007/s10703-016-0250-y