Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Matthias Goldbach"'
Autor:
Alban Zaka, Stefan Mueller, Tom Herrmann, Ekaterina Yurchuk, Uwe Schroder, Thomas Mikolajick, Till Schlösser, R. Hoffmann, Jan Paul, Matthias Goldbach, Roman Boschke, Johannes Müller
Publikováno v:
IEEE Transactions on Electron Devices. 60:4199-4205
Ferroelectric Si:HfO2 has been investigated starting from metal-ferroelectric-metal (MFM) capacitors over metal-ferroelectric-insulator-semiconductor (MFIS) and finally ferroelectric field-effect-transistor (FeFET) devices. Endurance characteristics
Publikováno v:
Microelectronics Reliability. 51:2081-2085
A good control of the transient enhanced dopant diffusion is needed for MOSFET scaling down to the sub 50 nm regime. Carbon ion implant is known to significantly suppress the transient enhanced boron diffusion. However, carbon implantation is also re
Publikováno v:
Microelectronic Engineering. 82:460-466
TiSi, CoSi, CoSi"2 and NiSi are used for a salicide contact metallisation in DRAM devices. The contact resistance is studied: for contacts to tungsten silicide-gates, for self-aligned n-type contacts in the memory cell array and for large borderless
Autor:
Sriramkumar Venugopalan, Vivek Joshi, Sriram Balasubramanian, Ralf van Bentum, Gert Burbach, Matthias Goldbach, Luis Zamudio
Publikováno v:
CICC
Our study breaks down the dependence of SRAM read current (Iread) variability (σIread) into constituting pass-gate (PG) and pull down (PD) NMOS transistor variability. We report a bottoms-up model for σIread including feedback in stacked transistor
Autor:
Thomas Mikolajick, Stefan Jakschik, Matthias Goldbach, Lothar Frey, Guntrade Roll, Andre Wachowiak
Publikováno v:
Proceedings of Technical Program of 2012 VLSI Technology, System and Application.
The gate leakage (I Gate , table 1) is reduced compared to the conventional 65nm process with SiON dielectric (Fig. 2). The leakage current due to direct tunneling is simulated using the CET as fitting parameter. High-k PFETs with an oxide extension
Autor:
Alexander Burenkov, Stefan Jakschik, Guntrade Roll, Thomas Mikolajick, Lothar Frey, Matthias Goldbach
In this paper we present a detailed investigation on the influence of carbon co-implantation in the source/drain extension on the leakage current and defect density in PFET transistors. Carbon is used to reduce the transient enhanced boron diffusion,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5a6cbb0f47045d3629147a3e11609fe1
https://publica.fraunhofer.de/handle/publica/226485
https://publica.fraunhofer.de/handle/publica/226485
Publikováno v:
2010 Proceedings of the European Solid State Device Research Conference.
In this paper we present a detailed investigation on the influence of carbon co-implantation in the source/drain extension on leakage current and defect density in PFET transistors. Carbon is used to reduce the transient enhanced boron diffusion, to
Publikováno v:
A Perspective Look at Nonlinear Media ISBN: 9783540639954
It is well known that charge density wave systems exhibit a variety of phenomena related to the existence of metastable states: Electric measurements reveal hystereses in both their thermal and electric behavior as well as different kinds of memory e
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b7168b5c201769273a39e5180199dbb
https://doi.org/10.1007/bfb0104974
https://doi.org/10.1007/bfb0104974
Autor:
Matthias Goldbach, B. Uhlig, Erhard Landgraf, G. Ilicali, M. Stadele, Jorg Radecker, J. Lindolf, S. Finsterbusch
Publikováno v:
2008 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA).
Based on a detailed I-V analysis, 2D/3D process/device simulation, and inline wafer bow measurements, we have investigated a number of stress-induced layout effects on MOSFET performance caused by hybrid STI fills (HARP/HDP and SOG/HDP). Variations o
Autor:
Johannes Kretz, Roy Zimmermann, M. Tesauro, Kang-Hoon Choi, F. Thrum, Katja Keil, Christoph Hohle, Rok Dittrich, Matthias Goldbach, Thomas Marschner
Publikováno v:
SPIE Proceedings.
Line edge roughness (LER) and line width roughness (LWR) have raised questions and concerns as current lithography techniques reduce critical dimensions (CD) below 50 nm. There are few applications of controlled variation of LER and LWR, even among t