Zobrazeno 1 - 10
of 58
pro vyhledávání: '"Matthew R. Guthaus"'
Publikováno v:
2020 IEEE International Electron Devices Meeting (IEDM).
OpenRAM is an open-source memory compiler infrastructure that can enable Design Technology Co-Optimization of SRAMs. SRAM DTCO is often plagued by limited access to robust, featured memory compilers. In particular, each technology often "reinvents th
Publikováno v:
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, vol 26, iss 10
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol 26, iss 10
Islam, R; Fahmy, HA; Lin, PY; & Guthaus, MR. (2018). DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 26(10), 2108-2117. doi: 10.1109/TVLSI.2018.2837681. UC Santa Cruz: Retrieved from: http://www.escholarship.org/uc/item/2hh0p6d0
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol 26, iss 10
Islam, R; Fahmy, HA; Lin, PY; & Guthaus, MR. (2018). DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 26(10), 2108-2117. doi: 10.1109/TVLSI.2018.2837681. UC Santa Cruz: Retrieved from: http://www.escholarship.org/uc/item/2hh0p6d0
In this paper, we present a new differential current-mode pulsed flip-flop (DCMPFF) for low-power clock distribution using a representative 45-nm CMOS technology. Experimental results show that the DCMPFF has a 47% faster clock-to-output (CLK-Q) dela
Autor:
Riadul Islam, Matthew R. Guthaus
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:1054-1062
In a high-performance VLSI design, the clock network consumes a significant amount of power. While most existing methodologies use voltage-mode (VM) signaling, these clock distributions lose a tremendous amount of dynamic power to charge/discharge th
Publikováno v:
ISCAS
A word line driver controls the access of cells in a row in Static Random Access Memories (SRAMs) and has a significant impact on SRAM speed and power consumption. When gate delay is the dominant factor, simple models are a good guideline for fast wo
Publikováno v:
VLSI-SoC
High performance systems often employ multi-ported memories to enhance the throughput and flexibility of the memory. Existing SRAM compilers offer limited control over the SRAM design and port configurations while SRAMs are commonly dual-ported. Expe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c85e6df8abfb9fa85801328243fe53be
https://escholarship.org/uc/item/7047n3k0
https://escholarship.org/uc/item/7047n3k0
Autor:
Matthew R. Guthaus, Bin Wu
Publikováno v:
VLSI-SoC
The delay of a square SRAM array is dominated by the bit line delay due to the high capacitance per unit length attached to the bit line. Hence, SRAM arrays are usually longer in the word line direction. However, the word line delay also increases dr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3d3e136b7bbc9043f2dcdab0a6b56416
https://escholarship.org/uc/item/63x770hp
https://escholarship.org/uc/item/63x770hp
Autor:
Matthew R. Guthaus, Riadul Islam
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:1156-1164
We propose a new paradigm for clock distribution that uses current, rather than voltage, to distribute a global clock signal with reduced power consumption. While current-mode (CM) signaling has been used in one-to-one signals, this is the first usag
Publikováno v:
MICRO
Gorman, DI; Guthaus, MR; & Renau, J. Hunter, HC; Moreno, J; Emer, JS; & Sánchez, D eds. (2017). Architectural opportunities for novel dynamic EMI shifting (DEMIS).. MICRO, 774-785. doi: 10.1145/3123939.3123973. UC Santa Cruz: Retrieved from: http://www.escholarship.org/uc/item/15s9256q
Gorman, DI; Guthaus, MR; & Renau, J. Hunter, HC; Moreno, J; Emer, JS; & Sánchez, D eds. (2017). Architectural opportunities for novel dynamic EMI shifting (DEMIS).. MICRO, 774-785. doi: 10.1145/3123939.3123973. UC Santa Cruz: Retrieved from: http://www.escholarship.org/uc/item/15s9256q
Processors emit non-trivial amounts of electromagnetic radiation, creating interference in frequency bands used by wireless communication technologies such as cellular, WiFi and Bluetooth. We introduce the problem of in-band radio frequency noise as
Publikováno v:
ACM Great Lakes Symposium on VLSI
In subthreshold operation, circuits are more sensitive to the impact of parametric variation due to reduced supply voltages. To meet timing specification and ensure reliable operation, circuits require compensation techniques that mitigate variation.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2ae53842d39cdb3b9b0427d537c62c40
https://escholarship.org/uc/item/1dq8892w
https://escholarship.org/uc/item/1dq8892w
Publikováno v:
ISCAS
Static Random Access Memories (SRAMs) are considered a major bottleneck in high performance System-on-Chip (SoC) design and there is a large demand for high performance SRAMs with minimal energy consumption. Time speculation techniques such as Razor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::98730c72aa7975554a0d5a4d2ff52a17
https://escholarship.org/uc/item/7nn0j5x3
https://escholarship.org/uc/item/7nn0j5x3