Zobrazeno 1 - 10
of 31
pro vyhledávání: '"Masayuki Furumiya"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 47:435-443
A small-size on-chip transformer-based digital isolator for power control systems is proposed. With a proposed pulse generation and detection scheme that enables a 5 V standard CMOS transistor to utilize GHz-band signals, transformer area is reduced
Autor:
Jun Kawahara, Koichi Ohto, Yoshihiro Hayashi, Ippei Kume, Masayuki Furumiya, Naoya Furutake, Naoya Inoue, Koichiro Matsui, Shinobu Saito, Toshiki Shinmura, Takeshi Toda, Takayuki Iwaki
Publikováno v:
Japanese Journal of Applied Physics. 46:1968-1973
Highly reliable metal–insulator–metal (MIM) capacitor with ultra-thin SiN dielectrics is developed on the surface-controlled bottom electrode in nanometer-scales. Coverage of the TiN bottom electrode with a Ta thin layer achieves smooth surface.
Publikováno v:
IEEE Journal of Solid-State Circuits. 38:101-106
We have developed a high-density CMOS image sensor with a normal mode and three signal-processing function modes: wide dynamic-range mode, motion-detection mode, and edge-extraction mode. Small pixel size and real-time operation are achieved by using
Autor:
Fuyuki Okamoto, Yuki Fujimoto, Masayuki Furumiya, Keisuke Hatano, Yasutaka Nakashiba, Michio Yotsuyanagi
Publikováno v:
Electronics and Communications in Japan (Part II: Electronics). 84:28-35
Autor:
T. Nakano, Yasuaki Hokari, Y. Taniji, Yukiya Kawakami, D. Syohji, Satoshi Katoh, T. Satoh, Nobukazu Teranishi, K. Orihara, Yasutaka Nakashiba, S. Suwazono, Masayuki Furumiya, H. Utsumi, M. Morimoto, N. Mutoh
Publikováno v:
IEEE Transactions on Electron Devices. 48:1922-1928
A 30 frames/s 2/3-in 1.3 M-pixel progressive scan interline-transfer charge-coupled device (IT-CCD) image sensor has been developed for video and digital still-camera applications. To obtain high frame-rate images, a 49-MHz driving horizontal CCD (H-
Autor:
Yuki Fujimoto, Masayuki Furumiya, Yasutaka Nakashiba, Yoshinori Muramatsu, Hiroaki Ohkubo, Fuyuki Okamoto, Susumu Kurosawa
Publikováno v:
IEEE Transactions on Electron Devices. 48:2221-2227
A high-photosensitivity and no-crosstalk pixel technology has been developed for an embedded active-pixel CMOS image sensor, by using a 0.35-/spl mu/m CMOS logic process. To increase the photosensitivity, we developed a deep p-well photodiode and an
Autor:
Yasutaka Nakashiba, Toshishige Yamada, Masayuki Furumiya, N. Mutoh, S. Suwazono, Yasuaki Hokari, A. Tanabe, T. Nakano, Keisuke Hatano, Satoshi Katoh, Satoshi Uchiya, H. Utsumi, Yukiya Kawakami, S. Kawai, D. Syohji, Nobukazu Teranishi, K. Orihara, M. Morimoto, Y. Taniji
Publikováno v:
IEEE Transactions on Electron Devices. 48:222-230
A 1/2-in 1.3 M-pixel progressive-scan interline-transfer charge-coupled-device (IT-CCD) image sensor has been developed for small, low-power mega-pixel digital still cameras (DSCs). The pixel size as small as 5 /spl mu/m square makes small-size progr
Autor:
Yasuaki Hokari, Satoshi Uchiya, N. Mutoh, K. Arai, T. Kawasaki, H. Utsumi, Tsuyoshi Nagata, Nobukazu Teranishi, Keisuke Hatano, Akiyoshi Kohno, Yasutaka Nakashiba, Masayuki Furumiya, T. Nakano, Ichiro Murakami
Publikováno v:
IEEE Transactions on Electron Devices. 47:1566-1572
New technologies to increase the photo-sensitivity and reduce the shutter voltage of the vertical over-flow-drain (VOD) have been developed for CCD image sensors. The photo-sensitivity was increased 40% by forming an anti-reflection film over the pho
Autor:
M. Morimoto, S. Suwazono, Keisuke Hatano, S. Kawai, Nobukazu Teranishi, K. Orihara, N. Mutoh, Ichiro Murakami, Masayuki Furumiya, H. Utsumi, C. Ogawa, Yasuaki Hokari, K. Arai, T. Satoh, T. Tamura
Publikováno v:
IEEE Transactions on Electron Devices. 44:1599-1603
We have determined the practical limits of cell size reduction in interline-transfer charge-coupled device (IT-CCD) image sensors, which result from diffraction occurring at the aperture above the photodiode. We have found that image cell size cannot
Autor:
Yasutaka Nakashiba, Hiroaki Ohkubo, Hiroaki Namba, Shinichi Uchida, Kuramoto Takafumi, Kenji Hayashi, Takasuke Hashimoto, Masayuki Furumiya
Publikováno v:
2012 Asia Pacific Microwave Conference Proceedings.
This paper describes the optimization method on choice of the metal layers and the Si substrate structure about the 3-Dimantional(3D) vertical solenoid inductor on the CMOS process. The optimization of metal layers that constituted 3D structure induc