Zobrazeno 1 - 10
of 67
pro vyhledávání: '"Masatada Horiuchi"'
Autor:
Ken Yamaguchi, Masatada Horiuchi
Publikováno v:
Solid-State Electronics. 48:2115-2124
Operation mechanisms of devices with electrically floating regions have been analyzed by device simulations. An insulator has been modeled as a wide-gap semiconductor and the device simulation has been carried out in the whole region including insula
Autor:
Masatada Horiuchi
Publikováno v:
IEEE Transactions on Electron Devices. 47:1593-1598
For pt.I see ibid., vol. 47, no.8, p.1587-92 (2000). A primary transistor having an embedded J-FET, or resistor, immediately under the source junction and a small subsidiary body-bias-control transistor enables the construction of a variable-threshol
Autor:
Masatada Horiuchi
Publikováno v:
IEEE Transactions on Electron Devices. 47:1587-1592
The floating-body effects in SOI CMOSFETs are fully suppressed by embedding a J-FET source structure immediately beneath the source/drain junction. The drain of the J-FET consists of a Schottky barrier diode; the holes generated in the body can easil
Publikováno v:
IEEE Transactions on Electron Devices. 45:1111-1115
A new type of silicon-on insulator (SOI) structure has been fabricated by using direct bonding technology to bury multilayered films consisting of poly-Si and SiO/sub 2/. A device with an ideal epitaxial channel structure was fabricated using a conve
Autor:
Shigeru Aoki, Masatada Horiuchi
Publikováno v:
Journal of The Electrochemical Society. 139:2589-2594
The role of bond strengthening by annealing after wafer bonding was studied. The bonded interfaces of various wafer bonding systems were microscopically examined using a scanning tunneling microscope and by making cross-sectional transmission electro
Autor:
Yasushi Goto, S. Talwar, H. Ashihara, Toshiyuki Mine, Akio Shima, Atsushi Hiraiwa, Yun Wang, Masatada Horiuchi
Publikováno v:
IEEE International Electron Devices Meeting 2003.
We have developed a novel LTP (laser thermal process) that dramatically enhances the laser exposure window by controlling the heating process in a self-limiting way (SL-LTP). The Vth roll-offs of MOSFETs formed by this method were remarkably improved
Autor:
N. Inada, Yasuhiro Shimamoto, Masatada Horiuchi, Takahiro Onai, F. Ootsuka, Ryuta Tsuchiya, Jiro Yugami, K. Ohnishi, S. Tsujikawa
Publikováno v:
2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).
We demonstrate 40-nm CMOS transistors for the 70-nm technology node. This transistor uses a high-k offset spacer (EOS: high-epsilon offset spacer) in achieving both a short-channel and high drivability along with SiN gate dielectrics with oxygen-enri
Autor:
Masatada Horiuchi, K. Ohoyu
Publikováno v:
Proceedings of IEEE International Electron Devices Meeting.
Silicon on insulator (SOI) structures were fabricated by using direct bonding technology to bury multilayered films consisting of poly-Si, Si/sub 3/N/sub 4/, and SiO/sub 2/. The structures were analyzed using SIMS, micro-Raman spectroscopy, and sprea
Autor:
Masatada Horiuchi
Publikováno v:
International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217).
An embedded resistor just under the source junction and a small subsidiary body-bias-control transistor enables construction of a variable-threshold SOI-MOSFET with a small area penalty and without any limitation on the power-supply voltage. In the p
Publikováno v:
1995 Symposium on VLSI Technology. Digest of Technical Papers.
An ultra-thin SOI MOSFET capable of operations at a current 1.5 times that of conventional deep sub-micron devices at low voltage is presented. This device is fabricated by a conventional MOS process on novel multi-layered SOI wafers.