Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Masashi Yanagita"'
Autor:
Hiroyuki Ikeda, T. Oishi, M. Katsumata, Yoshihisa Matoba, T. Wakano, Toyotaka Kataoka, Tsutomu Haruta, Kyohei Mizuta, Teruo Hirayama, Masashi Yanagita, R. Yamamoto, Shinichi Arakawa, Takayuki Ezaki, Y. Tanaka, H. Ishiwata, Takashi Nagano, S. Saito, Kazuichiroh Itonaga, J. Komachi, Matsumoto Shizunori, S. Watanabe, K. Ohno
Publikováno v:
2011 International Electron Devices Meeting.
We have developed a flat device structure, which we call “FLAT”, with no isolation grooves/ridges and no Si substrate etching in the imaging area of the CMOS Image Sensor (CIS). We employed this FLAT structure to achieve a 1.12 µm pitch pixel CI
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::42957a847b7f64b3711efc7c7babf06b
https://doi.org/10.1109/iedm.2011.6131511
https://doi.org/10.1109/iedm.2011.6131511
Autor:
Matsumoto Shizunori, Ikue Mizuno, Akira Matsumoto, Kyohei Mizuta, Teruo Hirayama, Tsutomu Haruta, Keiichi Ohno, Taku Umebayashi, Takeshi Matsuda, Iwao Sugiura, Harumi Ikeda, Masashi Yanagita, Takatoshi Kameshima, Masanori Harasawa, Shintaro Yamauchi, Kazuichiroh Itonaga, Toyotaka Kataoka
Publikováno v:
2009 IEEE International Electron Devices Meeting (IEDM).
We demonstrate the first ever 0.9µm pitch pixel CMOS image sensor(CIS), and reveal the problems that are likely to be encountered in future device structures. We have developed a set of guidelines for the design of high quantum efficiency(QE) CISs,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a30c047437c1cc26fb54647dee572cfa
https://doi.org/10.1109/iedm.2009.5424299
https://doi.org/10.1109/iedm.2009.5424299
Autor:
T. Oda, Minoru Nakamura, S. Kanda, K. Kugimiya, T. Ikuta, K. Yagami, T. Sugizaki, Masashi Yanagita, T. Ohchi, M. Shinohara
Publikováno v:
2008 Symposium on VLSI Technology.
We have successfully developed an alternative SRAM cell using a bulk thyristor-RAM (BT-RAM), which has a 35-nm gate-length with triple selective epitaxy layers (TELs) for the anode, the n-base, and the cathode. The TEL BT-RAM reads and writes at an u
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1186fadefde798f915bafc3b93e28f87
https://doi.org/10.1109/vlsit.2008.4588617
https://doi.org/10.1109/vlsit.2008.4588617
Autor:
T. Sugizaki, Masashi Yanagita, T. Ohchi, K. Kugimiya, K. Yagami, T. Oda, T. Ikuta, Minoru Nakamura, M. Shinohara, S. Kanda
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
We have successfully developed an alternative SRAM cell for the first time using a Bulk Thyristor-RAM (BT-RAM) with a Double selective Epitaxy technique for two Emitter regions (DEE). The DEE BT-RAM can read/write at Ins at a low-voltage of 0.6 V or
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a8299f055558681a66aeaa15fee40f76
https://doi.org/10.1109/vlsit.2007.4339770
https://doi.org/10.1109/vlsit.2007.4339770
Autor:
T. Oda, S. Kanda, T. Ikuta, T. Ohchi, M. Shinohara, Minoru Nakamura, K. Yagami, T. Sugizaki, Masashi Yanagita, K. Kugimiya
Publikováno v:
2007 IEEE International Electron Devices Meeting.
We have successfully developed an alternative SRAM cell for the first time using a bulk thyristor-RAM (BT-RAM) with triple selective epitaxy layers (TEL) for anode, n-base, and cathode. The n-base of the pnp transistor is a key for the thyristor char
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aec1e3b7fa31ae661d704b083c1d191d
https://doi.org/10.1109/iedm.2007.4419105
https://doi.org/10.1109/iedm.2007.4419105
Advantages of bulk over SOI in performance of thyristor-based SRAM cell with selective epitaxy anode
Autor:
R. Yamamoto, M. Shinohara, T. Sugizaki, Masashi Yanagita, T. Oda, S. Kanda, K. Kugimiya, Minoru Nakamura, T. Ohchi, K. Yagami, T. Ikuta
Publikováno v:
ESSDERC 2007 - 37th European Solid State Device Research Conference.
We fabricated alternative SRAM cells based on a thyristor using SOI and bulk Si wafers, and then compared their performance. A selective epitaxy technique was applied to form anode regions (SEA) for both types. These devices performed extremely well,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5f6199f3ddb7bc6113200fddb3c1135
https://doi.org/10.1109/essderc.2007.4430943
https://doi.org/10.1109/essderc.2007.4430943
Autor:
T. Ohchi, T. Sugizaki, Masashi Yanagita, R. Yamamoto, S. Kanda, I. Yamamura, Minoru Nakamura, K. Kugimiya, T. Oda, T. Ikuta, Motonari Honda, K. Yagami, M. Shinohara
Publikováno v:
2006 International Electron Devices Meeting.
We developed novel SRAM cells using bulk thyristor-RAM (BT-RAM). BT-RAM, formed on bulk Si wafers, is low cost and has good compatibility with logic process flows. BT-RAM has excellent performance, with a 100-ps read/write, high Ion/Ioff current rati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b16ae81fb77bf1f809955a19f13fc064
https://doi.org/10.1109/iedm.2006.346984
https://doi.org/10.1109/iedm.2006.346984