Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Masahiko Motoyama"'
Autor:
S. Takatsuka, Yasuro Shobatake, S. Kitaoka, Kenji Sakaue, Masahiko Motoyama, Hiroyuki Hara, M. Noda, Hiroshi Momose, M. Norishima, K. Maeguchi, Shoichi Shimizu, M. Ishibe, K. Matsuda, Y. Niitsu, S. Tanaka, Y. Kumaki, T. Kodama
Publikováno v:
IEEE Journal of Solid-State Circuits. 26:1133-1144
An experimental element switch LSI for asynchronous transfer mode (ATM) switching systems was realized using 0.8- mu m BiCMOS technology. The element switch transfers cells asynchronously when used in a buffered banyan network. Three key features of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e5eae8e7887f0c35383853b8bd84483
https://doi.org/10.1109/4.90074
https://doi.org/10.1109/4.90074
Autor:
Masahiko Motoyama, E. Shobatake, Yasuro Shobatake, S. Shimizu, Kenji Sakaue, M. Noda, Takashi Kamitake
Publikováno v:
IEEE Journal on Selected Areas in Communications. 9:1248-1254
The authors present a one-chip scalable 8*8 shared buffer switch LSI which includes a 256-cell buffer. Speedup, flow control, and input slot rotation functions are provided in order to interconnect LSIs for scaling-up without degrading cell loss rate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0ec6ed03167874f8b8f6f8b4ce0de55c
https://doi.org/10.1109/49.105171
https://doi.org/10.1109/49.105171
Autor:
Yuichi Miyazawa, H. Nakakita, K. Ise, A. Kanuma, Yoshihiro Ohba, Masahiko Motoyama, Y. Kaneko, Tadahiro Kuroda, K. Fujiwara, Yasuo Unekawa, K. Seki-Fukuda, S. Yoshioka, Takayasu Sakurai, M. Ono, Yukio Kamatani, Kenji Sakaue, T. Nakao, Tetsu Nagamatsu
Publikováno v:
1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
The switch element (SE) is a 622Mb/s, 8/spl times/8 shared-buffer ATM switch LSI for backbone LAN and WAN applications. The SE has 5 Gbps bandwidth, supporting 5 QoS classes delay priority and link-by-link multicast. Up to a 32/spl times/32 switch wi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::367bbe68ac209ee3076e8f0c0e227aa5
https://doi.org/10.1109/isscc.1996.488534
https://doi.org/10.1109/isscc.1996.488534
Publikováno v:
Cryptographic Hardware and Embedded Systems — CHES 2001 ISBN: 9783540425212
CHES
CHES
We proposed a fast parallel algorithm of Montgomery multiplication based on Residue Number Systems (RNS). An implementation of RSA cryptosystem using the RNS Montgomery multiplication is described in this paper. We discuss how to choose the base size
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0cf7b6f0c45a1bad5c663e3a3a8488f3
https://doi.org/10.1007/3-540-44709-1_30
https://doi.org/10.1007/3-540-44709-1_30
Autor:
Masahiko Motoyama, M. Ishibe, K. Yamaura, Sumio Tanaka, Hiroshi Momose, E. Kamagata, Shoichi Shimizu, Yasuro Shobatake, Y. Niitsu, Kenji Sakaue, S. Takatsuka, M. Noda, Katsuhiro Seta, Y. Shimojoh
Publikováno v:
1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8dea2f67f6e41a476e7dd2cbf90815b0
https://doi.org/10.1109/isscc.1991.689144
https://doi.org/10.1109/isscc.1991.689144
Conference
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