Zobrazeno 1 - 10
of 48
pro vyhledávání: '"Masa-Aki Fukase"'
Publikováno v:
Journal of Systemics, Cybernetics and Informatics, Vol 10, Iss 5, Pp 80-84 (2012)
A firewall function is indispensable for mobile devices and it demands low-power operations. To realize this demand, the authors have developed a firewall unit with a reconfigurable device. The firewall unit needs a large amount of register for the t
Externí odkaz:
https://doaj.org/article/dbabebc4396d49f1a3d3bfcd786522e9
Autor:
Masa-aki FUKASE, Tomoaki Sato
Publikováno v:
Journal of Systemics, Cybernetics and Informatics, Vol 5, Iss 6, Pp 13-21 (2007)
The development of single chip VLSI processors is the key technology of ever growing pervasive computing to answer overall demands for usability, mobility, speed, security, etc. We have so far developed a hardware cryptography-embedded multimedia mob
Externí odkaz:
https://doaj.org/article/05a34cf6f7144630812b3e85d0596bca
Publikováno v:
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :2614-2624
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d380c3f1b052aae996239c918084d88
https://doi.org/10.1587/transfun.e98.a.2614
https://doi.org/10.1587/transfun.e98.a.2614
Publikováno v:
IEEJ Transactions on Electronics, Information and Systems. 135:744-751
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d28759ca6cbe4f57cf165b44f4b1982b
https://doi.org/10.1541/ieejeiss.135.744
https://doi.org/10.1541/ieejeiss.135.744
Autor:
Masa-aki Fukase, Tomoaki Sato
Publikováno v:
ECTI Transactions on Electrical Engineering, Electronics, and Communications. 6:170-176
The key to protect huge amount of multimedia data in ubiquitous networks is to introduce safety aware high-performed single VLSI processor systems embedded with cipher process. Thus, we exploited the architecture of a hardware cryptography embedded m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4daf5500315d5dd6e9a1b53c3f60755c
https://doi.org/10.37936/ecti-eec.200862.171786
https://doi.org/10.37936/ecti-eec.200862.171786
Publikováno v:
ISCIT
In this paper, we propose a method to reduce clock skew among stacked chips by a clock distribution network with multiple source buffers (MSB CDN). The propagation delays to all chips that need a clock signal are tuned only in the chip with a clock s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b5f6344cf3ee70f92bd3d0bc14cf9261
https://doi.org/10.1109/iscit.2015.7458373
https://doi.org/10.1109/iscit.2015.7458373
Autor:
Atsushi Kurokawa, Masa-aki Fukase, Nanako Niioka, Tetsuya Kobayashi, Masayuki Watanabe, Masashi Imai, Rosely Karel
Publikováno v:
ISQED
This paper proposes an effective model for evaluating vertical signal propagation delay in through silicon via (TSV) based three-dimensional integrated circuits (3-D ICs). The capacitance model for on-chip interconnects is also proposed. All parasiti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3f633d5083ed922ced70bbdf51ccb596
https://doi.org/10.1109/isqed.2015.7085479
https://doi.org/10.1109/isqed.2015.7085479
Autor:
Nanako Niioka, Atsushi Kurokawa, Masa-aki Fukase, Masayuki Watanabe, Masashi Imai, Tetsuya Kobayashi, Rosely Karel
Publikováno v:
3DIC
This paper proposes closed-form expressions of parasitic parameters in a silicon substrate that consider substrate contacts. In general bulk CMOS technologies, the standard cells with bulk (substrate and well) contacts or tap cells for bulk contacts
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8fe28ca5dde9606d630a5c0654dc49c0
https://doi.org/10.1109/3dic.2014.7152178
https://doi.org/10.1109/3dic.2014.7152178
Autor:
Masayuki Watanabe, Masa-aki Fukase, Nanako Niioka, Masashi Imai, Atsushi Kurokawa, Tetsuya Kobayashi, Rosely Karel
Publikováno v:
APCCAS
Three-dimensional integrated circuits (3D ICs) provide a promising solution for overcoming delay/power problems of 2D ICs by stacking chips vertically. Signal propagation speed among the stacked chips is very important for 3D IC systems. We propose a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f4a816a551d92fc5fac5632b78d996c
https://doi.org/10.1109/apccas.2014.7032854
https://doi.org/10.1109/apccas.2014.7032854
Autor:
Masa-aki Fukase, Atsushi Kurokawa, Masashi Imai, Rosely Karel, Nanako Niioka, Tetsuya Kobayashi, Masayuki Watanabe
Publikováno v:
APCCAS
We propose a model for coupling that considers substrate contacts between through silicon vias (TSVs) in bulk-CMOS technologies. The proposed model is compact but has reasonable accuracy for the dense substrate contacts in large-scale three dimension
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::449f0ef8fdfb59a9e40b3c6d5fac164c
https://doi.org/10.1109/apccas.2014.7032893
https://doi.org/10.1109/apccas.2014.7032893