Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Maryse Wouters"'
Autor:
S. Bocchio, Zhang Hao, William Fornaciari, Vittorio Zaccaria, Carlos Kavka, Maryse Wouters, Umberto Bondi, Roberto Zafalon, Chris Wu, Luka Onesti, Alessandro Turco, Eugenio Villar, Gianluca Palermo, Hector Posadas, Chantal Ykman-Couvreur, Marcos Martinez, F. Castro, Geert Vanmeerbeeck, Prabhat Avasare, Fan Dongrui, Giovanni Mariani, Cristina Silvano
Publikováno v:
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures ISBN: 9781441988362
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures
Multi-objective Design Space Exploration of Multiprocessor SoC Architectures
This chapter introduces the design-flow of the MULTICUBE project whose main goal is the definition of an automatic multi-objective Design Space Exploration (DSE) framework to be used to tune the parameters of System-on-Chip architectures by taking in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a24aebe5dc2c6a785c9bb9290e0921a1
https://doi.org/10.1007/978-1-4419-8837-9_1
https://doi.org/10.1007/978-1-4419-8837-9_1
Autor:
Tang Shibin, Carlos Kavka, Giovanni Mariani, Marcos Martinez, S. Bocchio, Cristina Silvano, Fan Dong-rui, William Fornaciari, Zhang Hao, F. Castro, Alessandro Turco, Chris Wu, Maryse Wouters, Luka Onesti, Eugenio Villar, Gianluca Palermo, Hector Posadas, Umberto Bondi, Chantal Ykman-Couvreur, Prabhat Avasare, Geert Vanmeerbeeck, Vittorio Zaccaria, Roberto Zafalon
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9789400714878
ISVLSI (Selected papers)
ISVLSI (Selected papers)
Technology trends enable the integration of many processor cores in a System-on-Chip (SoC). In these complex architectures, several architectural parameters can be tuned to find the best trade-off in terms of multiple metrics such as energy and delay
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e3e1783831d40bde84e0eecdc848bd43
https://doi.org/10.1007/978-94-007-1488-5_4
https://doi.org/10.1007/978-94-007-1488-5_4
Publikováno v:
IEEE International Workshop on Rapid System Prototyping
Nowadays, new and powerful algorithms are developed by telecom engineers to enhance the communication link capacity and robustness. However, the step to build a demonstrator in order to validate the performance of the algorithm is huge. Therefore, we
Conference
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Conference
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