Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Martin Wirnshofer"'
Publikováno v:
IET Circuits, Devices & Systems. 8:19-26
In this study, the failure rate of flip-flops in future 16 nm complementary metal-oxide-semiconductor (CMOS) technologies is investigated. Using transistor level Monte Carlo simulations, the authors studied the influence of process variations and lon
Autor:
Martin Wirnshofer
Increasing performance demands in integrated circuits, together with limited energy budgets, force IC designers to find new ways of saving power. One innovative way is the presented adaptive voltage scaling scheme, which tunes the supply voltage acco
Autor:
Nasim Pour Aryan, Jonas Pistor, Steffen Paul, Nils Heidmann, Georg Georgakos, Doris Schmitt-Landsiedel, Nico Hellwege, Martin Wirnshofer, Dagmar Peters-Drolshagen
Publikováno v:
PATMOS
For a design which is tolerant to parameter variations caused by process, voltage, temperature and aging, precise monitoring of the reliability status becomes a prerequisite. In applications such as medical implants reliability in combination with po
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d15e1f75d8ced799c565383238e7af65
https://doi.org/10.1007/978-94-007-6196-4_1
https://doi.org/10.1007/978-94-007-6196-4_1
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
To evaluate the power saving potential of the Pre-Error AVS technique we use the Markov chain model, described in the previous chapter. The Markov chain describes the switching between the discrete output levels of the voltage regulator and thus repr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8388f14eef4c8223065f4bae544ef65e
https://doi.org/10.1007/978-94-007-6196-4_7
https://doi.org/10.1007/978-94-007-6196-4_7
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::90e4be6e0e261a1d8ac2a6f9160bf43a
https://doi.org/10.1007/978-94-007-6196-4_8
https://doi.org/10.1007/978-94-007-6196-4_8
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
In the Pre-Error AVS scheme the timing information is provided by in-situ delay monitors (Pre-Error flip-flops), that detect late but still non-erroneous data transitions in critical paths. Late data transitions are defined by the pre-error detection
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f7ebba04f3c98083d48ba3f2b3ddf4a
https://doi.org/10.1007/978-94-007-6196-4_4
https://doi.org/10.1007/978-94-007-6196-4_4
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
Variations in process, supply voltage and temperature (PVT) have always been an issue in Integrated Circuit (IC) Design. In digital circuits, PVT fluctuations affect the switching speed of the transistors and thus the timing of the logic. To guarante
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::35ba63b5cab6a317c3673812e50a61fb
https://doi.org/10.1007/978-94-007-6196-4_2
https://doi.org/10.1007/978-94-007-6196-4_2
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
The in-situ delay monitors used for our AVS approach are conventional flip-flops with additional circuitry to detect pre-errors (late data transitions). Therefore, we refer to these in-situ delay monitors also as Pre-Error flip-flops. Besides pre-err
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5187e19dede812ddce4c2b2ee08dcbd3
https://doi.org/10.1007/978-94-007-6196-4_5
https://doi.org/10.1007/978-94-007-6196-4_5
Autor:
Martin Wirnshofer
Publikováno v:
Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits ISBN: 9789400761957
Adapting the supply voltage by using in-situ delay monitors forms a closed-loop control system. The last chapter focused on the in-situ delay monitors (Pre-Error flip-flops) acting as sensors of this system. The following chapter will now deal with t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b6e44cf8379d525ee3f6604614ab0bc
https://doi.org/10.1007/978-94-007-6196-4_6
https://doi.org/10.1007/978-94-007-6196-4_6