Zobrazeno 1 - 10
of 104
pro vyhledávání: '"Martin, Omana"'
Autor:
William, Fornaciari, Federico, Reghenzani, Federico, Terraneo, Davide, Baroffio, Cecilia, Metra, Martin, Omana, Rodriguez Condia, Josie E., Matteo Sonza Reorda, Birke, Robert Renè Maria, Colonnelli, Iacopo, Mittone, Gianluca, Aldinucci, Marco, Gabriele, Mencagli, Francesco, Iannone, Filippo, Palombi, Giuseppe, Zummo, and Daniele Cesarini, Federico, Tesser
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od_______970::4da8690fef7d78e9929a531130140fac
https://hdl.handle.net/2318/1920390
https://hdl.handle.net/2318/1920390
Publikováno v:
2022 IEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8aa13f139bbd3492e4453c6e6b2efd9d
https://doi.org/10.1109/iolts56730.2022.9897808
https://doi.org/10.1109/iolts56730.2022.9897808
Publikováno v:
The Journal of Supercomputing. 77:6692-6713
Appearances of specific transition patterns during data transfer in bus lines of modern high-performance computing systems, such as communicating structures of accelerators for deep convolutional neural networks, commercial Network on Chips, and memo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e42753e0fa6a355fe898756d739bc5aa
https://doi.org/10.1007/s11227-020-03527-0
https://doi.org/10.1007/s11227-020-03527-0
Resistive Random Access Memories (ReRAMs) are considered amongst the most promising candidates to replace silicon-based memories. However, ReRAMs suffer from reliability issues associated to faults affecting their resistive elements and their selecto
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::589236ebff5a25465ef72ae93293a5e9
http://hdl.handle.net/11585/842646
http://hdl.handle.net/11585/842646
Photovoltaic (PV) systems are increasingly adopted as a source of green energy. Due to the high economic investment that they usually involve, their reliability is becoming of concern. Recent studies have proven that faults likely to affect the inver
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7fd4df6529f4cadfa5cd35caacbd37d8
http://hdl.handle.net/11585/668805
http://hdl.handle.net/11585/668805
Analyses recently presented in the literature have shown that the Bias Temperature Instability (BTI) ageing phenomenon may increase significantly the susceptibility to soft errors (SEs) of robust latches. Particularly, this is the case of low-cost ro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::debf6e406346655545a53e65d6f1db48
http://hdl.handle.net/11585/585719
http://hdl.handle.net/11585/585719
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:238-246
The generation of significant power droop (PD) during at-speed test performed by Logic Built-In Self Test (LBIST) is a serious concern for modern ICs. In fact, the PD originated during test may delay signal transitions of the circuit under test (CUT)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a878c4c457833f116c92764d3f9be123
https://doi.org/10.1109/tvlsi.2016.2572606
https://doi.org/10.1109/tvlsi.2016.2572606
Autor:
Marco Grossi, Martin Omana
In this paper we analyze the effect of the Bias Temperature Instability (BTI) aging phenomenon on the delay of deskew buffers employed in high performance microprocessors. Our analysis shows that, during circuit lifetime, the delay induced by BTI on
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::13d9eff40d738542d5dcee818c89791f
http://hdl.handle.net/11585/694714
http://hdl.handle.net/11585/694714
Publikováno v:
Journal of Sensors, Vol 2019 (2019)
The continuous advance in sensors and sensing systems has a strong impact in agriculture and food production. Food is routinely screened to assess quality (such as physical appearance and organoleptic properties) and safety (absence of health threate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::037e9036040a6f4099e0824efafa71ca
http://hdl.handle.net/11585/842627
http://hdl.handle.net/11585/842627
We propose a strategy to reduce the propagation delay of microprocessors’ digital bus lines at very low costs in terms of area overhead, power consumption and power-delay product. Likewise some solutions adopted in industry nowadays, our strategy i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9099fda1d5c74547a85e069839b8fcf6
http://hdl.handle.net/11585/694710
http://hdl.handle.net/11585/694710