Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Mark Van Dal"'
Autor:
Sean R. C. McMitchell, Amey M. Walke, Kaustuv Banerjee, Sofie Mertens, Xiaoyu Piao, Ming Mao, Kostantine Katcko, Georgios Vellianitis, Mark Van Dal, Yu-Ming Lin, Geert Van den Bosch, Romain Delhougne, Gouri S. Kar
Publikováno v:
ACS Applied Electronic Materials. 5:858-864
Autor:
Liesbeth Witters, Rita Rooyackers, An De Keersgieter, Malgorzata Jurczak, Serge Biesemans, Thomas Y. Hoffmann, Ray Duffy, Mark Van Dal, Anabela Veloso, Rob Lander, Nadine Collaert, Bartek Pawlak
Publikováno v:
ECS Transactions. 19:45-54
We report a comprehensive evaluation and overview of the latest developments and technology challenges of FinFET-based devices. They offer improved electrostatics and steeper sub-threshold slopes, attractive for enabling further CMOS scaling, but can
Autor:
Ray Duffy, Liesbeth Witters, Gerben Doornbos, Georgios Vellianitis, Andriy Hikavyy, Malgorzata Jurczak, Lhi-Shue Lai, Bartek Pawlak, E. Altamirano, Rita Rooyackers, Monja Kaiser, Nadine Collaert, Mark Van Dal, Blandine Duriez, Tom Vandeweyer, Rob Lander, R. G. R. Weemaes, Marc Demand
Publikováno v:
ECS Transactions. 13:223-234
FinFET is a promising device concept towards the 32 nm CMOS technology node and beyond as it combines the benefits of multi-gated architecture, intrinsically having superior scaling behavior, with a highly manufacturable process. The present paper wi
Autor:
Bencherki Mebarki, O. Chamirian, M. A. Pawlak, Tushar Mandrekar, Karen Maex, Muriel de Potter, Anne Lauwers, Xavier Pages, Jorge A. Kittl, Toon Raymakers, Richard Lindsay, Mark Van Dal
Publikováno v:
Materials Science and Engineering: B. :29-41
Material issues that impact the applicability of Ni based silicides to CMOS flows were studied, including the excessive silicidation of narrow features, the growth kinetics of Ni 2 Si and NiSi on single-crystalline and poly-crystalline silicon and th
Autor:
Richard Lindsay, Jorge A. Kittl, Mark Van Dal, Karen Maex, Christa Vrancken, Anne Lauwers, Muriel de Potter, O. Chamirian
Publikováno v:
MRS Proceedings. 810
ABCTRACTSilicidation of small features of various geometries and sizes using Ni-silicide was studied. Effects of dopants, surface preparation and silicidation parameters on silicide morphology were investigated. It was found that Ni silicide thicknes
Autor:
Jorge A. Kittl, O. Chamirian, Anne Lauwers, Caroline Demeurisse, Mark Van Dal, Karen Maex, Muriel De Pottera, Amal Akheyar
Publikováno v:
MRS Proceedings. 810
Effects of alloying Ni with Pt and Ta on silicide properties for CMOS technology have been studied. It was found that Pt is soluble in NiSi, which is in line with literature, whereas Ta segregates towards the surface during thermal treatment. Additio
Autor:
Karen Maex, M. A. Pawlak, Anne Lauwers, Muriel de Potter, Amal Akheyar, Geoffrey Pourtois, Richard Lindsay, Mark Van Dal, Anil Kottantharayil, Jorge A. Kittl, O. Chamirian
Publikováno v:
MRS Proceedings. 810
This paper presents an overview of Ni-alloy (Ni, Ni-Pt and Ni-Ta) silicide development for the 45 nm node and beyond, including applications to self-aligned silicide (SALICIDE) processes, reaction with SiGe and strained Si on SiGe, and applications t
Autor:
Oxana Chamirian, Muriel De Potter, Karen Maex, Jorge Kittl, Judit G. Lisoni, Mark Van Dal, Olivier Richard, Anne Lauwers, Richard Lindsay, Amal Akheyar
Publikováno v:
MRS Proceedings. 765
An overview of silicide development for the 65 nm node and beyond is presented. The scaling behavior of Co based and Ni based silicides to sub-100 nm junctions and sub-40 nm gate lengths was investigated. Co and Co-Ni silicides required a high therma
Autor:
Philip Absil, Anne Lauwers, Caroline Demeurisse, Serge Biesemans, Jorge A. Kittl, Masaaki Niwa, Tom Hoffmann, Hong Yu Yu, Christa Vrancken, Anabela Veloso, Mark Van Dal, S. Kubicek, M. A. Pawlak
Publikováno v:
ECS Meeting Abstracts. :1021-1021
An overview of FUSI gates, emphasizing on Ni-based materials for applications into sub-45 nm CMOS is presented. The work function of FUSI gates was investigated, finding lower values (suitable for NMOS) for 1) gate stacks containing lanthanides (such
Autor:
Mark van Dal, A. Lauwers, J. Cunniffe, R. Verbeeck, C. Vrancken, C. Demeurisse, J.A. Kittl, K. Maex
Publikováno v:
ECS Meeting Abstracts. :634-634
not Available.