Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Mark Lefebvre"'
Autor:
Anabelle Laurent, Alex Cleveringa, Suzanne Fey, Peter Kyveryga, Nathan Wiese, Mark Lefebvre, Darren Newville, Daniel Quinn, John McGuire, Haiying Tao, Thomas F. Morris, Fernando E. Miguez
Publikováno v:
Scientific Data, Vol 10, Iss 1, Pp 1-7 (2023)
Abstract The late-season Corn Stalk Nitrate Test (CSNT) is a well-known tool to help evaluate the after-the-fact performance of nitrogen management. The CSNT has the unique ability to distinguish between optimal and excessive corn nitrogen status, wh
Externí odkaz:
https://doaj.org/article/1fc0baf50f7c4fb2b6806445730e6edb
Autor:
Regina Cho, Yun-Hyeon Kim, Joseph F. Lachowski, Mark Lefebvre, Rosemary Bell, Inho Lee, Matthew Thorseth, Mitsuru Haga, Wataru Tachikawa, Mark Scalisi, Yi Qin, Jonathan Prange, yoon Joo Kim, Jeff Calvert
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2017:1-22
Advanced packaging technologies require materials which will allow for better resolution of patterns associated with the ever more challenging device architecture, along with materials that will allow for higher throughput. Device throughput can be i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e00aa1b68cdd4a77137240e75b10263e
https://doi.org/10.4071/2017dpc-wp1_presentation3
https://doi.org/10.4071/2017dpc-wp1_presentation3
Autor:
Mark Scalisi, Matthew Thorseth, Masaaki Imanari, Mark Lefebvre, Inho Lee, Yil-Hak Lee, Sang-Min Park, Jeff Calvert, Jonathan Prange
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2016:000631-000649
Increasing market demand for portable high-performance electronic devices is requiring an increase in the I/O density in the chip packaging used to make these products. Flip-chip interconnects that enable advanced packaging utilize a C4 bumping proce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7ec89e81ce6b4cf9923c50b375bd92c2
https://doi.org/10.4071/2016dpc-tp14
https://doi.org/10.4071/2016dpc-tp14
Autor:
Luis Gomez, James Burnham, Bob Mikkola, Mark Lefebvre, Mark Scalisi, Bryan Lieb, Dave Erickson, Bridger Hoerner, Matthew Thorseth, Jeff Calvert
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2015:000510-000529
Through-silicon via (TSV) filling with electroplated Cu with short plating times and long bath life remains a challenge within the semiconductor and electronic packaging industries. TSVs are the primary enabler for advanced 3D architectures such as h
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cfee283388c12a468344799b896444e8
https://doi.org/10.4071/2015dpc-tp14
https://doi.org/10.4071/2015dpc-tp14
Autor:
Yi Qin, Wataru Tachikawa, Jonathan Prange, Jeffrey M. Calvert, Masaaki Imanari, Mark Lefebvre, Jianwei Dong, Julia Woertink, Yil-Hak Lee, Matthew Thorseth, Inho Lee
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2015:000611-000638
Flip-chip interconnect and 3-D packaging applications must utilize reliable, high-performance metallization products in order to produce highly-efficient, low-cost microelectronic devices. As the market moves to shrinking device architectural feature
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::189718f5c60c6f075c174c673271b262
https://doi.org/10.4071/2015dpc-tp23
https://doi.org/10.4071/2015dpc-tp23
Autor:
Regina Cho, Emily Banelis, Lingyun Wei, Masaaki Imanari, Mark Lefebvre, Kristen Flajslik, Jianwei Dong, Brandon Sherzer, Inho Lee, Yi Qin, Jeffrey M. Calvert, Wataru Tachikawa, Louis Grippo
Publikováno v:
2016 IEEE 66th Electronic Components and Technology Conference (ECTC).
As the advancement of transistor nodes faces unprecedented challenges and work continues to extend Moore's law at the back end of the line (BEOL), packaging has become one of the fastest growing segments in the semiconductor industry. Lead-free solde
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7e320bfb81cf0a0a8420600e3d7b15c7
https://doi.org/10.1109/ectc.2016.22
https://doi.org/10.1109/ectc.2016.22
Autor:
Ravi Pokhrel, Yil-Hak Lee, Won-Hyun Lee, Su-Han Woo, Mark Scalisi, Yu Hua Kao, Luis Gomez, Mark Lefebvre, Jonathan D Prange, Kirk Thompson
Publikováno v:
ECS Meeting Abstracts. :1137-1137
The micro-electronics packaging industry is seeking new Cu electroplating products to achieve improved I/O density in chips and to enable a variety of packaging architectures. Solder-capped copper pillars are currently used as interconnects in advanc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::76357d06d0ff1035bd090cfe73d5e175
https://doi.org/10.1149/ma2018-02/33/1137
https://doi.org/10.1149/ma2018-02/33/1137
Autor:
Masaru Kusaka, Mark Lefebvre, Masaru Seita, George Allardyce, Shinjiro Hayashi, Hideki Tsuchida
Publikováno v:
Circuit World. 29:9-14
This paper describes a copper electroplating enabling technology for filling microvias. Driven by the need for faster, smaller and higher performance communication and electronic devices, sequential build up (SBU) technology has been adopted as a via
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fd269b58ffebc06ad526b9cac58b856
https://doi.org/10.1108/03056120310454943
https://doi.org/10.1108/03056120310454943
Autor:
Kwok-Wai Yee, Betty Xie, Crystal P. L. Li, Mark Lefebvre, Ming-Yao Yen, Elie H. Najjar, Ming-Hung Chiang, Hsien-Chang Chen, Hsu-Hsin Tai
Publikováno v:
2013 8th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT).
Electrolytic copper microvia filling is an enabling technology, prominently used in today's manufacture of high density interconnect (HDI) and packaging substrate applications for better reliability, increased circuit densification, design flexibilit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d0b91c7f718c9b781340254e38e4d6f6
https://doi.org/10.1109/impact.2013.6706698
https://doi.org/10.1109/impact.2013.6706698
Autor:
Lingyun Wei, Matthew Thorseth, Mark Scalisi, Jonathan P Prange, Inho Lee, Yil-Hak Lee, yoon Joo Kim, Mark Lefebvre, Jeffrey Calvert, Wataru Tachikawa
Publikováno v:
ECS Meeting Abstracts. :1918-1918
Conventional acid electroplated copper is being widely used in semiconductor industries from back-end-of-the-line (BEOL) interconnects to advanced packaging applications such as copper pillar, redistribution layer (RDL) copper and Through Silicon Via
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eadc032983773a385bae353546d3b908
https://doi.org/10.1149/ma2016-02/29/1918
https://doi.org/10.1149/ma2016-02/29/1918