Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Mark D. Maddox"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:1481-1492
This paper presents a passive-charge-sharing successive approximation register (SAR) analog-to-digital converter (ADC) that achieves 16-bit linearity. It is known that on-chip passive charge sharing suffers from poor linearity due to the unregulated
Autor:
Hongxing Li, William Buckley, Michael C. W. Coin, Mark D. Maddox, Naveed Naeem, Derek Hummerston
Publikováno v:
ISSCC
The SAR ADC is the architecture of choice for high-precision Nyquist ADCs (>16b) with MS/s speed. To achieve the required linearity performance, precision SAR ADCs require calibration to correct mismatch errors in the capacitive digital-to-analog con
Autor:
Mark D. Maddox, Ned Guthrie, Michael C. W. Coln, Nikhil Mascarenhas, Ron Kapusta, Lalinda D. Fernando, Junhua Shen, Baozhen Chen, Akira Shikata
Publikováno v:
2017 Symposium on VLSI Circuits.
This paper presents a successive approximation register (SAR) analog-to-digital converter (ADC) that is much smaller and faster than other recently reported precision (16-bit and beyond) SAR ADCs. In addition, it features low input capacitance and an
Autor:
Michael C. W. Coln, Baozhen Chen, Mark D. Maddox, Lalinda D. Fernando, Junhua Shen, Ron Kapusta
Publikováno v:
A-SSCC
This paper presents a first reported passive-charge-sharing SAR ADC that achieves 16 bit linearity. It is known that on chip passive-charge-sharing suffers from poor linearity due to the unregulated reference voltage during bit trials. The proposed u
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:1869-1869
In the above paper [1] , one co-author was mistakenly left out of the byline. The correct byline and Junhua Shen’s biography and photograph are as follows.