Zobrazeno 1 - 10
of 71
pro vyhledávání: '"Marina Topa"'
Autor:
Alecsandra Rusu, Emilian David, Vasile Grosu, Marina Topa, Andi Buzo, Bianca Carbunescu, Georg Pelz
Publikováno v:
IEEE Access, Vol 12, Pp 136436-136450 (2024)
This paper presents an adaptive pre-silicon integrated circuit verification algorithm that incorporates a machine learning algorithm. This approach can overcome the traditional corner-based process-voltage-temperature verification limitations conside
Externí odkaz:
https://doaj.org/article/09a7adbb39e44090994795f77cd37254
Publikováno v:
Journal of Sensors, Vol 2021 (2021)
This paper presents a novel topology for multipurpose drivers for MEMS sensors and actuators, suitable for integration in low-cost high-voltage (HV) CMOS processes, without a triple well. The driver output voltage, V MEMS , can be programmed over a w
Autor:
Cosmin-Sorin Plesa, Cristian Raducan, Alina-Teodora Grajdeanu, Marina Topa, Andrei Negoita, Marius Neag
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:3740-3752
This article proposes an LDO with fast response to load transients that can handle any practical capacitive loads. These features are mainly due to a novel frequency compensation circuit tailored for its error amplifier, which is based on an improved
Publikováno v:
2021 International Semiconductor Conference (CAS).
In the offline AC-DC power conversion there is a race to make the devices cheaper and more reliable. This trend makes researchers and engineers to look more and more for primary side regulation, as it makes the converter simpler, with less parts and,
Publikováno v:
Advances in Electrical and Computer Engineering, Vol 19, Iss 1, Pp 9-16 (2019)
In this paper, the PAELib - an occupied area and power dissipation estimation library written in VHDL - and its use cases are presented. Estimates are based on the structural description of a CMOS digital circuit made with gates/components included i
Publikováno v:
2020 International Symposium on Electronics and Telecommunications (ISETC)
The yield is considered a key performance measure in determining the success of semiconductor manufacturing. As the inherent process variation affects the yield and causes redesign, quick and accurate methods are needed for yield analysis and failure
Publikováno v:
2020 IEEE 26th International Symposium for Design and Technology in Electronic Packaging (SIITME).
Adaptive verification is gaining increasing use as solution to overcome the coverage problem of complex integrated circuits' verification. As its name suggests, it places more points in regions of interest by learning the information from previous da
Publikováno v:
2020 International Semiconductor Conference (CAS).
This paper presents three novel solutions for generating voltage stimuli necessary to assess the sensitivity of analog circuits to supply variations by performing laboratory measurements. The resulting test setups replicate the real-life operating co
Publikováno v:
TSP
This paper presents the power&area aware modeling approach of CMOS digital circuits and PAELib, its VHDL implementation. Today’s low-power and high power density designs justify the necessity of power and area estimates in early digital design stag
Publikováno v:
2020 43rd International Spring Seminar on Electronics Technology (ISSE).
Adaptive verification appears to be an efficient solution for the time}-consuming simulations of complex integrated circuits with multiple inputs and outputs. Compared to the traditional (one-shot) experimental design, in which all samples are select