Zobrazeno 1 - 10
of 93
pro vyhledávání: '"Maria Toledano-Luque"'
Autor:
Andreas Kerber, B. Min, Maria Toledano-Luque, K. Nagahiro, S. Cimino, Zakariae Chbili, P. Paliwoda, Durgamadhab Misra, T. Nigam, Luigi Pantisano
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 19:249-254
This paper discusses the impact of self-heating (SH) on ring-oscillator (RO) reliability and its correlation to hot carrier (HC) degradation. We show that HC degradation modulation due to SH is only significant for logic PFETs at highly accelerated d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea912bbda69b970db763e40a040827c0
https://doi.org/10.1109/tdmr.2019.2916230
https://doi.org/10.1109/tdmr.2019.2916230
Autor:
T. Kauerauf, T. Nigam, B. Min, M. Siddabathula, Germain Bossu, Maria Toledano-Luque, P. Paliwoda, M. Nour
Publikováno v:
IRPS
Standard CMOS reliability has been focused on digital applications and the user profiles associated with these products. However, emerging applications in mobility, automotive, communication networks and data centers require additional, more rigorous
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::64c62195dad78c746d5e9023e7b27aca
https://doi.org/10.1109/irps46558.2021.9405151
https://doi.org/10.1109/irps46558.2021.9405151
Autor:
A. Gupta, P. Yee, O. H. Gonzalez, T. Nigam, M. Nour, P. Paliwoda, D. Ioannou, Michael J. Hauser, L. Jiang, Luigi Pantisano, S. Cimino, Fernando Guarin, B. Min, Maria Toledano-Luque, David A. Lee, A. Vayshenker, Stewart E. Rauch, W. Liu
Publikováno v:
NATW
This work presents various device self-heating temperature sensing techniques and discusses their application in device reliability projection. Details of sensor design, technology choice, layout and ambient temperature impact on measurement results
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0feed1328981b3951dd53ba108345c5
https://doi.org/10.1109/natw49237.2020.9153081
https://doi.org/10.1109/natw49237.2020.9153081
Autor:
A. Zainuddin, N. Mavilla, A. Gupta, S. Cimino, Jeyaraj Antony Johnson, T. Nigam, B. Min, Maria Toledano-Luque, Purushothaman Srinivasan, M. Iqbal Mahmud, S. Rao
Publikováno v:
IRPS
Impact of process choices in terms of work function (WF) tuning and junction implant energy optimization for hot carrier (HCI) reliability in advanced FINFET technology is discussed here. The work focuses on understanding the nature and location of d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abbe6d716eb8facfd0f7212e145ee924
https://doi.org/10.1109/irps.2019.8720535
https://doi.org/10.1109/irps.2019.8720535
Autor:
Maria Toledano-Luque, Praveen Raghavan, Pieter Weckx, Moonju Cho, Guido Groeseneken, Sebastien Morrison, Doyoung Jang, Marie Garcia Bardon, Kenichi Miyaguchi, Rudy Lauwereins, Jacopo Franco, Halil Kukner, Francky Catthoor, Ben Kaczer, Liesbet Van der Perre
Publikováno v:
Microprocessors and Microsystems. 39:1039-1051
Negative Bias Temperature Instability (NBTI) is one of the major time-dependent degradation mechanisms that impact the reliability of advanced deeply scaled CMOS technologies. NBTI can cause workload-dependent shifts on a transistor's threshold volta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9beec29dbac6252a18a857dfd4d67203
https://doi.org/10.1016/j.micpro.2015.06.008
https://doi.org/10.1016/j.micpro.2015.06.008
Assessment of tunnel oxide and poly-Si channel traps in 3D SONOS memory before and after P/E cycling
Autor:
Robin Degraeve, J. Van Houdt, Pieter Blomme, G. Van den bosch, Maria Toledano-Luque, Antonio Arreghini, Laurent Breuil, K.H. Lee
Publikováno v:
Microelectronic Engineering. 147:45-50
Evaluation of RTN trap effect and amount of interface traps before and after different P/E cycles. Full and macaroni channel devices show similar interface degradation trend after P/E cycle endurance test and both of them are RTN dominated by band#2.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::81e34dfe3bcadaec2a0dd9538859bdc8
https://doi.org/10.1016/j.mee.2015.04.016
https://doi.org/10.1016/j.mee.2015.04.016
Autor:
Lars-Ake Ragnarsson, Thomas Chiarella, Maria Toledano-Luque, Robin Degraeve, Anda Mocuta, Naoto Horiguchi, Philippe Roussel, Aaron Thean
Publikováno v:
IEEE Transactions on Electron Devices. 61:3139-3144
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4406497beed0c632d3cc88758a9229b3
https://doi.org/10.1109/ted.2014.2340699
https://doi.org/10.1109/ted.2014.2340699
Autor:
Maria Toledano-Luque, Jürgen Bömmels, Thomas Kauerauf, I. De Wolf, Yunlong Li, Baojun Tang, Yohan Barbarin, K. Croes, Robin Degraeve, Zsolt Tőkei, Y. Q. Wang
Publikováno v:
Microelectronics Reliability. 54:1675-1679
Highly porous low-k dielectrics are essential for downscaling of the interconnects for 20–10 nm technologies. A planar capacitor test vehicle was used to investigate the intrinsic time dependent dielectric breakdown (TDDB) reliability of low-k diel
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fa577eac9ae3b6c1d6a042dcfee29d50
https://doi.org/10.1016/j.microrel.2014.07.089
https://doi.org/10.1016/j.microrel.2014.07.089
Autor:
J. Van Houdt, G. Van den bosch, Laurent Breuil, Y. Q. Wang, Catherine Robinson, Weidong Zhang, Jian Fu Zhang, Baojun Tang, Maria Toledano-Luque
Publikováno v:
Microelectronics Reliability. 54:2258-2261
High-k dielectric stacks have been used in the 20 nm generation of floating gate (FG) flash memory cells. However, electron trapping in high-k materials remains a major concern for further development of FG technology. The hybrid FG (HFG) device with
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::33fc19e4dd030548177ded7562c88f5c
https://doi.org/10.1016/j.microrel.2014.07.087
https://doi.org/10.1016/j.microrel.2014.07.087
Autor:
Laurent Breuil, Maria Toledano-Luque, Weidong Zhang, Geert Van den bosch, Zhigang Ji, Pieter Blomme, Robin Degraeve, Jan Van Houdt, Mohammed Zahid, Jian Fu Zhang, Baojun Tang
Publikováno v:
IEEE Transactions on Electron Devices. 61:1299-1306
High density of electron trapping in high-κ intergate dielectric (IGD) materials remains a major concern for planar memory cells with either poly-Si or hybrid floating gates (FGs). In this paper, for the first time, using the ultrafast I-V measureme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b3328b751df12076b1edfd6ade4d5771
https://doi.org/10.1109/ted.2014.2313041
https://doi.org/10.1109/ted.2014.2313041