Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Marco Mestice"'
Publikováno v:
IEEE Access, Vol 11, Pp 76941-76952 (2023)
Links able to sustain high-speed data transfer while exposed to radiation phenomena are required by several applications, including aerospace and high-energy physics experiments. To satisfy this need, this paper outlines the design of a radiation-har
Externí odkaz:
https://doaj.org/article/f4669416d4954635a541108a5f69af4e
Publikováno v:
Sensors, Vol 20, Iss 14, p 4013 (2020)
The design of a Phase-Locked Loop (PLL) to generate the clock reference for the new Spacefibre standard is presented in this paper. Spacefibre has been recently released by the European Space Agency (ESA) and supports up to 6.25 Gbps for on-board sat
Externí odkaz:
https://doaj.org/article/409977d2db8c4524b30e84e2cf6ded8a
Publikováno v:
Electronics
Volume 12
Issue 3
Pages: 778
Volume 12
Issue 3
Pages: 778
The current trend of increasing the complexity of hardware accelerators to improve their functionality is highlighting the problem of sharing a high-frequency clock signal for all integrated modules. As the clock itself is becoming the main limitatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::37297402b71f982f5f595c2f0a0ccfe2
Publikováno v:
Sensors (Basel, Switzerland)
Sensors
Volume 20
Issue 14
Sensors, Vol 20, Iss 4013, p 4013 (2020)
Sensors
Volume 20
Issue 14
Sensors, Vol 20, Iss 4013, p 4013 (2020)
The design of a Phase-Locked Loop (PLL) to generate the clock reference for the new Spacefibre standard is presented in this paper. Spacefibre has been recently released by the European Space Agency (ESA) and supports up to 6.25 Gbps for on-board sat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8cd1de474540c953c11626d41656df11
http://europepmc.org/articles/PMC7411804
http://europepmc.org/articles/PMC7411804
Publikováno v:
Lecture Notes in Electrical Engineering ISBN: 9783030372767
ApplePies
ApplePies
This paper presents the modeling and design activity of a PLL (Phase-Locked Loop) architecture to generate the clock reference for the new ESA Spacefibre standard for on-board satellite communications up to 6.25 Gbps. Starting from a 6.25 GHz VCO rad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55e6096a4e0b7bdb717b53ed94b39682
https://doi.org/10.1007/978-3-030-37277-4_52
https://doi.org/10.1007/978-3-030-37277-4_52
