Zobrazeno 1 - 10
of 61
pro vyhledávání: '"Marc Belleville"'
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 7, Iss 2, p 11 (2017)
This paper introduces a plug-and-play on-chip asynchronous communication network aimed at the dynamic reconfiguration of a low-power adaptive circuit such as an internet of things (IoT) system. By using a separate communication network, we can addres
Externí odkaz:
https://doaj.org/article/45fba3c517d844df92b0ba1ac58047df
Autor:
Suzanne Lesecq, Duy-Hieu Bui, Edith Beigne, Dominique Morche, Diego Puschini, Gilles Sicard, Marc Belleville, Jean Frédéric Christmann, Anca Molnos
Publikováno v:
Journal of Low Power Electronics. 13:298-309
Publikováno v:
Microelectronics Journal. 57:76-86
In this paper, we propose pulse-triggered flip-flops (pulsed-FF) and register file in 28nm Ultra-Thin-Body-and-Box Fully-Depleted-Silicon-on-Insulator (UTBB-FDSOI) technology, dedicated to ultra-wide voltage range (UWVR) operation. A pulsed-FF compos
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 62:1546-1554
In this paper, a detailed analysis and comparison of nanoelectromechanical systems (NEMS) and CMOS technologies for low power adiabatic logic implementation is presented. Fundamental limits of CMOS-based adiabatic logic are identified. Analytic relat
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 7, Iss 2, p 11 (2017)
Journal of Low Power Electronics and Applications; Volume 7; Issue 2; Pages: 11
Journal of Low Power Electronics and Applications; Volume 7; Issue 2; Pages: 11
This paper introduces a plug-and-play on-chip asynchronous communication network aimed at the dynamic reconfiguration of a low-power adaptive circuit such as an internet of things (IoT) system. By using a separate communication network, we can addres
Publikováno v:
Solid-State Electronics. 84:38-45
This paper presents an overview of the challenges and opportunities when designing digital integrated circuits in nano-scale technologies. Major applications requirements and nano-technologies design limitations are introduced. Design solutions curre
Publikováno v:
2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
The paper describes a new asynchronous communication network for reconfiguration of adaptive Wireless Sensor Network (WSN) nodes. The use of adaptive blocks is motivated by the need to increase the performance of the node while being energy efficient
Autor:
Olivier P. Thomas, Alain Toffoli, Fabienne Allain, Olivier Weber, Thierry Poiroux, Francois Andrieu, Jean-Philippe Noel, Olivier Faynot, Marc Belleville, J. Mazurier
Publikováno v:
Journal of Low Power Electronics. 8:125-132
Publikováno v:
Journal of Low Power Electronics. 6:201-210
In this paper, we propose an on-chip dc-dc buck converter for fine-grain dynamic voltage scaling (DVS) on a multi-power domain SoC. The proposed circuit converts from the I/O voltage to the required core operating voltage. This regulator is equipped
Publikováno v:
PATMOS
This paper introduces a novel asynchronous communication network for reconfiguration purposes inside an adaptive Wireless Sensor Network (WSN) Node. To insure an efficient energy consumption, both analog and digital reconfigurable blocks, able to ada