Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Manjunath Shevgoor"'
Publikováno v:
ISPASS
In future memory systems, some regions of memory will be periodically unavailable to the processor. In DRAM systems, this may happen because a rank is busy performing refresh. In non-volatile memory systems, this may happen because a rank is busy dra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::db291bb84f0b8b37934ed3452fd89258
https://doi.org/10.1109/ispass.2016.7482071
https://doi.org/10.1109/ispass.2016.7482071
Publikováno v:
MICRO
Trusted applications frequently execute in tandem with untrusted applications on personal devices and in cloud environments. Since these co-scheduled applications share hardware resources, the latencies encountered by the untrusted application betray
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c31b631f1a41645d31991c5f6d291513
https://doi.org/10.1145/2830772.2830795
https://doi.org/10.1145/2830772.2830795
Autor:
Seth H. Pugsley, Sahil Koladiya, Manjunath Shevgoor, Zeshan A. Chishti, Christopher B. Wilkerson, Rajeev Balasubramonian
Publikováno v:
MICRO
Prior work in hardware prefetching has focused mostly on either predicting regular streams with uniform strides, or predicting irregular access patterns at the cost of large hardware structures. This paper introduces the Variable Length Delta Prefetc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c1fb9f3a7e2d0e9448ef88847bce057e
https://doi.org/10.1145/2830772.2830793
https://doi.org/10.1145/2830772.2830793
Publikováno v:
ICCD
Several memory vendors are pursuing different kinds of memory cells that can offer high density, non-volatility, high performance, and high endurance. There are several on-going efforts to architect main memory systems with these new NVMs that can co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9568d5037ceb20a659bf1f820ae3fe73
https://doi.org/10.1109/iccd.2015.7357164
https://doi.org/10.1109/iccd.2015.7357164
Autor:
Al Davis, Niladrish Chatterjee, Jung-Sik Kim, Aniruddha N. Udipi, Rajeev Balasubramonian, Manjunath Shevgoor
Publikováno v:
MICRO
Many of the pins on a modern chip are used for power delivery. If fewer pins were used to supply the same current, the wires and pins used for power delivery would have to carry larger currents over longer distances. This results in an "IR-drop" prob
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4828610164b924f1ea3fa046367a158a
https://doi.org/10.1145/2540708.2540726
https://doi.org/10.1145/2540708.2540726
Autor:
Ravi Iyer, Niladrish Chatterjee, Rajeev Balasubramonian, Ramesh Illikkal, Zhen Fang, Al Davis, Manjunath Shevgoor
Publikováno v:
MICRO
The DRAM main memory system in modern servers is largely homogeneous. In recent years, DRAM manufacturers have produced chips with vastly differing latency and energy characteristics. This provides the opportunity to build a heterogeneous main memory
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bc27104223a2fcb4fc2e70a019b4c507
https://doi.org/10.1109/micro.2012.11
https://doi.org/10.1109/micro.2012.11
Autor:
Manu Awasthi, Viii Srinivasan, Manjunath Shevgoor, Bipin Rajendran, Kshitij Sudan, Rajeev Balasubramonian
Publikováno v:
HPCA
Many memory cell technologies are being considered as possible replacements for DRAM and Flash technologies, both of which are nearing their scaling limits. While these new cells (PCM, STT-RAM, FeRAM, etc.) promise high density, better scaling, and n
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::42c29e5520231de6d4cb53d44e7b4b29
https://doi.org/10.1109/hpca.2012.6168941
https://doi.org/10.1109/hpca.2012.6168941