Zobrazeno 1 - 10
of 69
pro vyhledávání: '"Manish, Chandhok"'
Autor:
Ibrahim Ban, Robert L. Bristol, Han Wui Then, Pratik Koirala, Tronic Tristan A, Kimin Jun, Rajat Kanti Paul, Nicole K. Thomas, Chouksey Siddharth, Hafez Walid M, D. Staines, W. Rachmady, P. Agababov, Fischer Paul B, T. Talukdar, Kevin Lin, T. Michaelos, Huang Cheng-Ying, Brandon Holybee, B. Krist, Marko Radosavljevic, Manish Chandhok, J. Peck
Publikováno v:
2020 IEEE Symposium on VLSI Technology.
We expand on our work in [1] by demonstrating both Si P- and NMOS finfet transistors monolithically integrated with GaN transistors on 300mm Si(111) wafers using 3D integration. With the Si finfet architecture, we are able to take advantage of the fi
Autor:
Sansaptak Dasgupta, Robert L. Bristol, D. Staines, Kimin Jun, Fischer Paul B, J. Peck, Rajat Kanti Paul, Hafez Walid M, Nicole K. Thomas, Ibrahim Ban, Huang Cheng-Ying, Mueller Brennen, W. Rachmady, T. Michaelos, Kevin Lin, Marko Radosavljevic, Chouksey Siddharth, Manish Chandhok, Nidhi Nidhi, Tronic Tristan A, B. Krist, Han Wui Then, P. Agababov, Brandon Holybee, T. Talukdar
Publikováno v:
2019 IEEE International Electron Devices Meeting (IEDM).
We have demonstrated industry’s first 300mm 3D heterogeneous integration of high performance, low-leakage high-K dielectric metal gate enhancement-mode (e-mode) GaN NMOS and Si PMOS transistors on 300mm high-resistivity (HR) Si(111) substrate, enab
Publikováno v:
2018 IEEE International Interconnect Technology Conference (IITC).
Enabling resistance and capacitance scaling are key to delivering interconnect performance for future technology nodes [1]. Copper interconnects become less advantageous at smaller dimensions due to the large mean free path of Copper and the need for
Autor:
Ramanan V. Chebiam, Jasmeet S. Chawla, Seung Hoon Sung, Colin T. Carver, James S. Clarke, Mona Mayeh, Hui Jae Yoo, Bojarski Stephanie A, Robert B. Turkot, B. Krist, Manish Chandhok, Christopher J. Jezewski, M. J. Kobrinski, M. Harmes
Publikováno v:
2016 IEEE International Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC).
A process to achieve 6 nm minimum dimension interconnect wires is realized using standard 193 nm lithography. Various metals including copper are optimized to gap fill features, and tested for electrical performance and reliability. Measurements show
Autor:
Florencia Paredes, Byungki Jung, Christopher K. Ober, Jing Sha, Todd R. Younkin, Michael Thompson, Ulrich Wiesner, Manish Chandhok
Publikováno v:
ACS Nano. 6:5830-5836
Probing chemical reaction kinetics in the near-solid state (small molecules and polymers) is extremely challenging because of the restricted mobility of reactant species, the absence of suitable analytical probes, and most critically the limited temp
Autor:
Manish Chandhok, Gilroy Vandentop, Micahel J. Leeson, E. Steve Putna, Grant M. Kloster, Uday Shah, Todd R. Younkin
Publikováno v:
Journal of Photopolymer Science and Technology. 24:127-136
Extreme Ultraviolet (EUV) lithography is a leading technology option for manufacturing at the 22nm half pitch node and beyond. Implementation of the technology will require continued progress on several key supporting infrastructure challenges, inclu
Publikováno v:
Journal of Photopolymer Science and Technology. 24:487-490
Chemically amplified photoresists require a post exposure bake (PEB) to catalytically deprotect the polymer backbone. However, excessive diffusion of the photogenerated acid during PEB results in resolution loss and line edge roughness. As both depro
Autor:
E. Steve Putna, Kent N. Frasure, Uday Shah, Todd R. Younkin, Manish Chandhok, Willy Rachmady, Wang Yueh
Publikováno v:
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 26:2265-2270
In order to meet the linewidth roughness (LWR) requirements for the 16nm node, postprocessing methods need to be investigated to reduce the LWR after the lithography step. We present the results of five different techniques applied to a single extrem
Autor:
James S. Clarke, M. Harmes, Mona Mayeh, Hazel Lang, Hui Jae Yoo, Naskar Sudipto, Seung Hoon Sung, Bojarski Stephanie A, John J. Plombon, Colin T. Carver, Kevin L. Lin, Manish Chandhok, B. Krist, Jasmeet S. Chawla
Publikováno v:
2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM).
Nickel silicide is an attractive option for interconnects at small dimensions because of its short electron mean free path and good electromigration behavior. Nickel silicide interconnects can be integrated using either a subtractive or damascene pro
Autor:
Manish Chandhok, Florian Gstrein, Ashish N. Gaikwad, Eungnak Han, Kranthi Kumar Elineni, Praveen K. Setu, Alan Myers, Todd R. Younkin, Paul A. Nyhus, Charles H. Wallace, Tronic Tristan A
Publikováno v:
Advances in Patterning Materials and Processes XXXII.
The self-assembling behavior of thermally annealed PS-b-PMMA block copolymer derivatives (GEN2 BCPs) was evaluated using a substrate modified by a random copolymer, commonly called a ‘brush’. Similar to PS-b-PMMA, surface modification using the r