Zobrazeno 1 - 10
of 38
pro vyhledávání: '"Majid Ahadi"'
Publikováno v:
IEEE Access, Vol 7, Pp 53629-53640 (2019)
Estimation of jitter and eye diagram in high-speed serial channels can be challenging. The existing methods might fail to show inter-symbol interference (ISI) and data dependent jitter because they are either excessively time consuming or only applic
Externí odkaz:
https://doaj.org/article/c69af7897fab4e2ab43d746bb5f901e0
Autor:
Majid Ahadi Dolatsara
Publikováno v:
IEEE Letters on Electromagnetic Compatibility Practice and Applications. 5:41-47
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::848f1b8015fdeb82cf1254c7a8a14ba1
https://doi.org/10.1109/lemcpa.2023.3247777
https://doi.org/10.1109/lemcpa.2023.3247777
Autor:
Jinwoo Kim, Nael Mizanur Rahman, Hakki Mert Torun, Majid Ahadi Dolatsara, Venkata Chaitanya Krishna Chekuri, Sung Kyu Lim, Madhavan Swaminathan, Saibal Mukhopadhyay
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 11:2148-2157
In this article, we present an effective methodology for co-design, co-analysis and the system-level optimization of chiplet/interposer power delivery network (PDN) in 2.5D IC designs. In our methodology, we first generate a commercial-grade heteroge
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::13bb8bf8c18fe1b8fa5cfa866a7e9b99
https://doi.org/10.1109/tcpmt.2021.3113664
https://doi.org/10.1109/tcpmt.2021.3113664
Autor:
Majid Ahadi Dolatsara
Publikováno v:
2022 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (EMCSI).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2480f765b577322dff5d4453d4abda5
https://doi.org/10.1109/emcsi39492.2022.10050240
https://doi.org/10.1109/emcsi39492.2022.10050240
Autor:
Heechun Park, Hakki Mert Torun, Madhavan Swaminathan, Majid Ahadi Dolatsara, Tushar Krishna, Sung Kyu Lim, Eric Qin, Gauthaman Murali
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29:605-616
The 2-D CMOS process technology scaling may have reached its pinnacle, yet it is not feasible to manufacture all computing elements at lower technological nodes. This has opened a new branch of chip designing that allows chiplets on different technol
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::12359e424a90e1b4db20357e03cd13a4
https://doi.org/10.1109/tvlsi.2021.3058300
https://doi.org/10.1109/tvlsi.2021.3058300
Autor:
Sung Kyu Lim, Madhavan Swaminathan, Jinwoo Kim, Wiren D. Becker, Jose A. Hejase, Majid Ahadi Dolatsara
Publikováno v:
IEEE Transactions on Electromagnetic Compatibility. 63:246-258
One of the favorable tools for signal integrity evaluation is eye diagram analysis. This is traditionally performed with a lengthy transient simulation, which can be prohibitively time consuming for complex high-speed channels with a low bit error ra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::119b8cd664cbf936c4a0b6387a34fc70
https://doi.org/10.1109/temc.2020.3012960
https://doi.org/10.1109/temc.2020.3012960
Autor:
Satwik Patnaik, Mohammed Nabeel, Venkata Chaitanya Krishna Chekuri, Heechun Park, Sung Kyu Lim, Alabi Bojesomo, Johann Knechtel, Majid Ahadi Dolatsara, Jinwoo Kim, Ozgur Sinanoglu, Madhavan Swaminathan, Saibal Mukhopadhyay
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 10:2047-2060
Interposer-based 2.5-D integrated circuits (ICs) enable the chip-level reuse of hard intellectual properties (IPs), also known as chiplets. Such system-level integration shortens the design cycle considerably for large-scale and heterogeneous chips.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f8ab0111bf2e5210a0f8ba4928236c2a
https://doi.org/10.1109/tcpmt.2020.3033136
https://doi.org/10.1109/tcpmt.2020.3033136
Autor:
Xianbo Yang, Osama Waqar Bhatti, Madhavan Swaminathan, Nikita Ambasana, Pavel Roy Paladhi, Wiren D. Becker, Majid Ahadi Dolatsara
Publikováno v:
2021 IEEE 30th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::892daf47fff18ee76aa689bfe793a63d
https://doi.org/10.1109/epeps51341.2021.9609225
https://doi.org/10.1109/epeps51341.2021.9609225
Akademický článek
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Publikováno v:
2020 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS).
Designing CTLE of high-speed channels can be complicated and time consuming. To alleviate this issue, this paper investigates the invertible neural networks (INNs) for inverse design of the CTLE. In this approach, a desired eye height and eye width i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a805de6ebea6fee9e97e52c7197c1c41
https://doi.org/10.1109/edaps50281.2020.9312919
https://doi.org/10.1109/edaps50281.2020.9312919