Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Mahadev Nemani"'
Autor:
S.C. Song, Giri Nallapati, Irfan Khan, Nader Nikfar, Bohan Yan, Miguel Miranda, Bruce Lim, Mali Nagarajan, Joon-Young Park, Vaishnav Srinivas, Reza Langari, Bharani Chava, Venu Sanaka, Venu Boynapalli, Paras Gupta, Shree Pandey, Biancun Xie, Peijie Feng, Jihong Choi, Titash Rakshit, Ravi Shenoy, Mahadev Nemani, Colin Verrilli, John Zhu, Jun Chen, Mark Nakamoto, Lily Zhao, Yangyang Sun, Francois Atallah, Jonghae Kim, Rashid Attar, Chidi Chidambaram
Publikováno v:
2021 IEEE International Electron Devices Meeting (IEDM).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03992d931fb1f04b814d365a32acce6f
https://doi.org/10.1109/iedm19574.2021.9720530
https://doi.org/10.1109/iedm19574.2021.9720530
Autor:
Praveen Mosalikanti, Chris Mozak, Muntaquim Chowdhury, Nasser A. Kurd, Mahadev Nemani, Timothy M. Wilson, Raghavan Kumar, Jeffrey L. Miller, Ramy E Aly, Subramani Bhamidipati, Ali M. El-Husseini, Mark L. Neidengard
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:119-130
Westmere is the latest IA processor family for mobile, desktop and server market segments, implemented on Intel's second-generation high-k metal gate 32 nm process. Westmere not only increases core count, cache size, and frequency within the previous
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c0cce3d3763957b051194b2225d8e33e
https://doi.org/10.1109/jssc.2010.2079430
https://doi.org/10.1109/jssc.2010.2079430
Autor:
Mahadev Nemani
Publikováno v:
Proceedings of the 49th Annual Design Automation Conference.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c1f69fc09cfad3cc217dd4de1824873c
https://doi.org/10.1145/3259217
https://doi.org/10.1145/3259217
Autor:
Muntaquim Chowdhury, Jeffrey L. Miller, Mahadev Nemani, Subramani Bhamidipati, Timothy M. Wilson, Christopher P. Mozak, Nasser A. Kurd
Publikováno v:
ISSCC
The Westmere processor is implemented on a high-к metal-gate 32nm process technology [1] as a compaction of the Nehalem processor family [2]. Figure 5.1.1 shows the 6-core dual-socket server processor and the 2-core single-socket processor for mains
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9507b82d9d5df0b25d4f70dad1b71b43
https://doi.org/10.1109/isscc.2010.5434033
https://doi.org/10.1109/isscc.2010.5434033
Autor:
Mahadev Nemani
Publikováno v:
Proceedings of the 2004 international symposium on Low power electronics and design.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d871267917ec2730ab33c3f8096d28e
https://doi.org/10.1145/3246116
https://doi.org/10.1145/3246116