Layout optimalisation for bipolar power transistors

Autor: Mouthaan, A.J., van der Scheer, A.B., Boezen, H., Krabbenborg, B.H., de Graaff, H.C.

Publikováno v: Proceedings of the 25th European Solid State Device Research Conference, ESSDERC '95, 389-392
STARTPAGE=389;ENDPAGE=392;TITLE=Proceedings of the 25th European Solid State Device Research Conference, ESSDERC '95

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=narcis______::59f4e53b61f8a17dcee64755c8acff7f
https://research.utwente.nl/en/publications/1719ea2d-77de-43cf-aceb-b4358f68bdfd