Zobrazeno 1 - 2
of 2
pro vyhledávání: '"M.V. Petrochenkov"'
Autor:
D.A. Lebedev, M.V. Petrochenkov
Publikováno v:
Труды Института системного программирования РАН, Vol 31, Iss 3, Pp 67-76 (2019)
State of the art microprocessor systems usually include complex hierarchy of a cache memory. Coherence protocols are used to maintain memory consistency. An implementation of memory subsystem in HDL (hardware description language) is complex and erro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e652788064455e7bdc931d3e27ff0adc
https://ispranproceedings.elpub.ru/jour/article/view/1180
https://ispranproceedings.elpub.ru/jour/article/view/1180
Publikováno v:
Труды Института системного программирования РАН, Vol 29, Iss 4, Pp 257-268 (2018)
This article proposes approaches used to verify 10 Gigabit Ethernet controllers developed by MCST. We present principles of the device operation - they provide a set of memory-mapped registers and use direct memory access, and their characteristics.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::57315fb28f84df92c2abf2382913a104
https://doi.org/10.15514/ispras-2017-29(4)-17
https://doi.org/10.15514/ispras-2017-29(4)-17