Zobrazeno 1 - 10
of 28
pro vyhledávání: '"M.J. Saccamango"'
Autor:
Shao-Fu S. Chu, Somnuk Ratanaphanyarat, Roy Childs Flaker, Jente B. Kuang, G.G. Shahidi, Lawrence F. Wagner, L. Hsu, M.J. Saccamango
Publikováno v:
IEEE Journal of Solid-State Circuits. 32:837-844
This paper presents a study of sub-0.25-/spl mu/m CMOS SRAM bitline circuitry on partially depleted (PD) silicon-on-insulator (SOI) technology. SOI implementations outperform conventional bulk ones due to significant reduction of collective device ju
Publikováno v:
1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345).
It has been reported (Kuang et al., 1997; Lu et al., 1997) that SOI passgate circuits suffer history effects and adverse initial-cycle parasitic bipolar currents, which cause difficulties in circuit timing and limit direct design reuse from original
Autor:
James H. Comfort, M.M. Pelella, S.F. Chu, P.T. Nguyen, M.J. Saccamango, Ronald W. Knepper, P.P. Peressini, S. Ratanaphanyarat, S.E. Fischer
Publikováno v:
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.
The device characteristics and performance leverage of a SiGe epitaxial-base heterojunction bipolar transistor (HBT) are compared to those of an advanced Si double-poly ion-implanted (I/I)-base bipolar junction transistor (BJT) npn structure. In addi
Autor:
M.J. Saccamango, P.P. Peressini, B. Cunningham, Somnuk Ratanaphanyarat, Ronald W. Knepper, K. DeVries, Lawrence F. Wagner, P. Strugazow, J.L. Snare, S.F. Chu, S.E. Fischer, P.T. Nguyen, Kyong-Min Kim, A. Lucchese
Publikováno v:
Proceedings of the 1992 Bipolar/BiCMOS Circuits and Technology Meeting.
Arsenic shadowing, which is an important consideration for the small-emitter effect in bipolar polysilicon-emitter transistors, was simulated using two-dimensional process and device modeling tools. Results are compared with data for conventional and
Autor:
E. Eld, D. Sunderland, H. Ng, T. Cotler, S. Subbanna, B. Chen, Asit Kumar Ray, S. Wu, Emmanuel F. Crabbe, Jonathan Z. Sun, J. Snare, Vincent J. McGahay, L. Su, Kurt A. Tallman, M.J. Saccamango, J. Lasky, R. Schulz, Paul D. Agnello, Stephen E. Greco, Bijan Davari, A.J. Allen
Publikováno v:
International Electron Devices Meeting. Technical Digest.
In this work, we demonstrate a 6.9 sq. /spl mu/m embedded SRAM cell in a 0.25 /spl mu/m physical design-rule salicide high-performance CMOS technology. The scalability of this salicide-CMOS embedded-SRAM technology is demonstrated by functionality of
Autor:
Paul Ronsheim, M.J. Saccamango, J.Y.-C. Sun, James H. Comfort, S. Verdonckt-Vandebroek, S. Ratanaphanyarat, Jeffrey B. Johnson, Phillip J. Restle, David L. Harame, A. Acovic, E. Ganin, S.A. Furkay, Stephan A. Cohen
Publikováno v:
International Electron Devices Meeting 1991 [Technical Digest].
A novel antimony-preamorphized phosphorus process (Sb/P) for NMOS source/drain formation is presented. It is demonstrated that very shallow ( >
Autor:
D.J. Schepis, F. Assaderaghi, D.S. Yee, W. Rausch, R.J. Bolam, A.C. Ajmera, E. Leobandung, S.B. Kulkarni, R. Flaker, D. Sadana, H.J. Hovel, T. Kebede, C. Schiller, S. Wu, L.F. Wagner, M.J. Saccamango, S. Ratanaphanyarat, J.B. Kuang, M.C. Hsieh, K.A. Tallman, R.M. Martino, D. Fitzpatrick, D.A. Badami, M. Hakey, S.F. Chu, B. Davari, G.G. Shahidi
Publikováno v:
International Electron Devices Meeting. IEDM Technical Digest.
In this paper a 0.25 /spl mu/m SOI CMOS technology is described. It uses undepleted SOI devices with nominal channel length of 0.15 /spl mu/m, minimum channel length in the 0.1 /spl mu/m range, supply voltage of 1.8 V, local interconnect, 6 levels of
Publikováno v:
2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185).
This paper presents a floating-body charge monitor technique, which does not require the use of body contacts. This technique improves the performance and timing robustness of MUX-type and SRAM bit line circuits on partially depleted (PD) SOI CMOS. I
Publikováno v:
2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125).
SOI pass transistor circuits are vulnerable to initial-cycle parasitic bipolar current which can cause speed degradation or functional failures (Kuang et al, 1997; Lu et al, 1997). This paper describes a novel floating body charge monitoring method w
Publikováno v:
Applied Physics Letters. 61:1066-1068
Experiments are described in which ∼0.2‐s‐wide argon laser pulses are incident on a 6‐μm‐thick n− Si epitaxial layer. Local melting and refreezing of both the layer and a small volume of the underlying p+ boron‐doped Si substrate occur