Zobrazeno 1 - 10
of 106
pro vyhledávání: '"M.-C. Roure"'
Autor:
A. Schembri, Christophe Jany, Loic Sanchez, Laetitia Adelmini, Karim Hassan, Bertrand Szelag, K. Ribaud, M. C. Roure
Publikováno v:
2019 IEEE Photonics Conference (IPC).
In this paper we present the hybrid III-V/Si photonic platform developed in CEA-LETI. The overall integration is done in a fully CMOS compatible 200mm technology, scalable to 300 mm wafers, leveraging the large scale integration capabilities of silic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b27add448fb9c11bb7a1672473104406
https://doi.org/10.1109/ipcon.2019.8908325
https://doi.org/10.1109/ipcon.2019.8908325
Autor:
Pascal Besson, Laurent Vallier, M. C. Roure, Mickael Martin, Jean-Paul Barnes, M. Rebaud, Virginie Loup, P.E. Raynal
Publikováno v:
ECS Journal of Solid State Science and Technology
ECS Journal of Solid State Science and Technology, IOP Science, 2019, 8 (2), pp.P106-P111. ⟨10.1149/2.0131902jss⟩
ECS Journal of Solid State Science and Technology, 2019, 8 (2), pp.P106-P111. ⟨10.1149/2.0131902jss⟩
ECS Journal of Solid State Science and Technology, IOP Science, 2019, 8 (2), pp.P106-P111. ⟨10.1149/2.0131902jss⟩
ECS Journal of Solid State Science and Technology, 2019, 8 (2), pp.P106-P111. ⟨10.1149/2.0131902jss⟩
International audience; Before metal deposit or epitaxial regrowth steps, efficient surface preparations are mandatory in order to remove both contaminants (C, F) and surface oxides. In this paper, we assess several cleaning sequences and compare the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cf8ea4af02e3c4ef72b0b6217f66ec0b
https://hal-cea.archives-ouvertes.fr/cea-02186469
https://hal-cea.archives-ouvertes.fr/cea-02186469
Autor:
K. Hassan, B. Szelag, L. Adelmini, B. Montmayeul, L. Sanchez, E. Ghegin, P. Rodriguez, S. Bensalem, F. Nemouchi, T. Bria, M. Brihoum, P. Brianceau, E. Vermande, O. Pesenti, A. Schembri, R. Crochemore, S. Dominguez, M.-C. Roure, C. Jany
Publikováno v:
Extended Abstracts of the 2018 International Conference on Solid State Devices and Materials.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f34bddd17869bfe697bddcd2c1ed559f
https://doi.org/10.7567/ssdm.2018.h-3-01
https://doi.org/10.7567/ssdm.2018.h-3-01
Autor:
R. Crochemore, O. Pesenti, A. Schembri, S Domínguez, M. Brihoum, Saddek Bensalem, T. Bria, Loic Sanchez, Karim Hassan, Bertrand Szelag, Christophe Jany, Pierre Brianceau, Ph. Rodriguez, M. C. Roure, Laetitia Adelmini, E. Vermande, B. Montmayeul, E. Ghegin, Fabrice Nemouchi
Publikováno v:
2017 IEEE International Electron Devices Meeting (IEDM).
In this paper we demonstrate the first integration of a hybrid III-V/Si laser in a fully CMOS compatible 200mm technology. Device with SMSR up to 50 dB and a maximum output power of 4mW coupled in the waveguide have been measured. The fabrication flo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6bc18d4e9dba5c9fdc77fb3ce705a78
https://doi.org/10.1109/iedm.2017.8268450
https://doi.org/10.1109/iedm.2017.8268450
Autor:
Chrystel Deguet, K. Romanjek, Laurent Clavelier, S. Soliveres, R. Truche, M. Vinet, A. Pouydebasque, G. Le Carval, M.-C. Roure, C. Le Royer, H. Grampeix, Loic Sanchez, Claude Tabone, Simon Deleonibus, J.M. Hartmann
Publikováno v:
Solid-State Electronics. 52:1285-1290
We report on the fabrication and electrical characterization of deep sub-micron (gate length down to 105 nm) GeOI pMOSFETs. The Ge layer obtained by hetero-epitaxy on Si wafers has been transferred using the Smart Cut TM process to fabricate 200 mm G
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4797045475f182408fcd7fcafbe23250
https://doi.org/10.1016/j.sse.2008.04.019
https://doi.org/10.1016/j.sse.2008.04.019
Publikováno v:
Microelectronic Engineering. 84:2455-2459
Self-aligned barriers (SAB) are investigated for the 45nm technology node and beyond to improve copper electromigration and stress-migration resistance. The impact of plasma and cleaning processes used in the integration were studied on CoWPB-SAB. Re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fb9cfbd9988635610ceec7111d0f318
https://doi.org/10.1016/j.mee.2007.05.059
https://doi.org/10.1016/j.mee.2007.05.059
Autor:
Mickael Martin, Ludovic Ecarnot, Pascal Besson, Daniel Delprat, M. C. Roure, Christelle Veytizou, A. Salaun, Christophe Morales, Thierry Baron, E. Beche, Frank Fournel, M. Cordeau, Patrice Gergaud, T. Signamarcheix, Iuliana Radu, Frédéric Mazen, Sylvie Favier, Julie Widiez, Gweltaz Gaudin, S. Sollier
Publikováno v:
2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).
In this work we demonstrate for the first time 300 mm InGaAs on Insulator (InGaAs-OI) substrates. A 30 nm thick InGaAs layer was successfully transferred using low temperature Direct Wafer Bonding (DWB) and the Smart CutTM technology. The epitaxial g
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4eb1a532556e2aff0d50503dc51ff2ff
https://doi.org/10.1109/s3s.2015.7333495
https://doi.org/10.1109/s3s.2015.7333495
Autor:
X. Garros, P. Caubet, L. Tosti, Francois Andrieu, N. Allouti, C. Le Royer, F. Ponthenier, Sébastien Barnola, P.K. Baumann, S. Morvan, U. Weber, P. Perreau, Gerard Ghibaudo, A. Seignard, C. Euvrard, Yves Morand, Maurice Rivoire, L. Desvoivres, M.-C. Roure, C. Leroux, F. Martin, R. Gassilloud, M. Casse, Olivier Weber, Thierry Poiroux, Pascal Besson
Publikováno v:
Microelectronic Engineering
Microelectronic Engineering, Elsevier, 2013, 109, pp.306-309. ⟨10.1016/j.mee.2013.03.045⟩
Microelectronic Engineering, 2013, 109, pp.306-309. ⟨10.1016/j.mee.2013.03.045⟩
Microelectronic Engineering, Elsevier, 2013, 109, pp.306-309. ⟨10.1016/j.mee.2013.03.045⟩
Microelectronic Engineering, 2013, 109, pp.306-309. ⟨10.1016/j.mee.2013.03.045⟩
Graphical abstractDisplay Omitted We integrated a gate-last on high-k first on planar fully depleted SOI MOSFETs.pMOSFETs reach a low threshold voltage of VTp=-0.2V.Gate-last pMOSFETS present one decade gate current gain compared to gate first ones.T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::55f688bcbb398063cfd6caffbf58fdf0
https://hal.archives-ouvertes.fr/hal-00996453
https://hal.archives-ouvertes.fr/hal-00996453