Zobrazeno 1 - 10
of 23
pro vyhledávání: '"M. Norishima"'
Autor:
Hiroomi Nakajima, B. Baccus, K. Inou, Naoyuki Shigyo, Toshihiko Iinuma, T. Wada, M. Norishima, Hiroshi Iwai
Publikováno v:
IEEE Transactions on Electron Devices. 39:648-661
A nonequilibrium diffusion model has been developed to study the influence of point defects on dopant redistribution, especially for transient enhanced diffusion. The coupled equations for point defects, substitutional impurities, and impurities/poin
Publikováno v:
IEEE Transactions on Electron Devices. 39:33-40
A low-temperature-processed (800-850 degrees C) bipolar transistor design suitable for the high-performance 0.5- mu m BiCMOS process is discussed. It has been found that insufficient activation of arsenic in the emitter, enhanced boron diffusion in t
Autor:
S. Takatsuka, Yasuro Shobatake, S. Kitaoka, Kenji Sakaue, Masahiko Motoyama, Hiroyuki Hara, M. Noda, Hiroshi Momose, M. Norishima, K. Maeguchi, Shoichi Shimizu, M. Ishibe, K. Matsuda, Y. Niitsu, S. Tanaka, Y. Kumaki, T. Kodama
Publikováno v:
IEEE Journal of Solid-State Circuits. 26:1133-1144
An experimental element switch LSI for asynchronous transfer mode (ATM) switching systems was realized using 0.8- mu m BiCMOS technology. The element switch transfers cells asynchronously when used in a buffered banyan network. Three key features of
Publikováno v:
Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits.
Publikováno v:
Proceedings of the Bipolar Circuits and Technology Meeting.
The effect of the interfacial native oxide layer between polycrystalline and single-crystal Si was investigated in the submicron-rule bipolar and BiCMOS processes. It was found that the native oxide increases the current gain, but significantly degra
Publikováno v:
International Technical Digest on Electron Devices Meeting.
A low-temperature (800-850 degrees C) processes bipolar transistor design suitable for high-performance 0.5- mu m BiCMOS process is discussed. It was found that insufficient activation of arsenic in the emitter, fast base boron diffusion in the low-c
Autor:
T. Kuroda, T. Fujita, S. Mita, T. Nagamatu, S. Yoshioka, F. Sano, M. Norishima, M. Murota, M. Kako, M. Kinugawa, M. Kakumu, T. Sakurai
Publikováno v:
1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
Publikováno v:
Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.
A 0.5- mu m BiCMOS technology for achieving speed performance with scaling is described. For the lower supply voltage of 3.3 V, the delay time of the conventional BiCMOS gate becomes almost equal to that of the CMOS gate. A BiNMOS circuit was employe
Publikováno v:
Proceedings of the 1991 Bipolar Circuits and Technology Meeting.
The influence of ion-implantation damage on the formation of emitter and base in advanced bipolar technologies is studied. A novel nonequilibrium diffusion model has been developed to analyze this issue. By comparing simulation and experiments on a 0
Autor:
M. Seto, M. Murota, K. Miyamoto, R. Ogawa, Minakshisundaran Balasubramanian Anand, Masahiro Inohara, M. Norishima, H. Ohtani, Masakazu Kakumu, K. Inoue, C. Fukuhara, Hideki Shibata, Tadashi Matsuno
Publikováno v:
1995 Symposium on VLSI Technology. Digest of Technical Papers.
Back-end-of-the line (BEOL) interconnect process integration for sub-half-micron ASIC applications with both low-cost merit and appropriately high performance is presented. Borderless and stacked contact/via structures to reduce chip size and minimiz